Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git (4cf44d52) · Commits · e / devices / android_kernel_xiaomi_nabu

drivers/net/wireless/ath/ath10k/ce.c

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -1512,7 +1512,7 @@ ath10k_ce_alloc_src_ring_64(struct ath10k *ar, unsigned int ce_id,
	ret = ath10k_ce_alloc_shadow_base(ar, src_ring, nentries);		ret = ath10k_ce_alloc_shadow_base(ar, src_ring, nentries);
	if (ret) {		if (ret) {
	dma_free_coherent(ar->dev,		dma_free_coherent(ar->dev,
	(nentries * sizeof(struct ce_desc) +		(nentries * sizeof(struct ce_desc_64) +
	CE_DESC_RING_ALIGN),		CE_DESC_RING_ALIGN),
	src_ring->base_addr_owner_space_unaligned,		src_ring->base_addr_owner_space_unaligned,
	base_addr);		base_addr);

drivers/net/wireless/ath/ath10k/ce.h

+42 −0

Original line number	Original line	Diff line number	Diff line
	@@ -383,4 +383,46 @@ static inline u32 ath10k_ce_interrupt_summary(struct ath10k *ar)
	return CE_INTERRUPT_SUMMARY;		return CE_INTERRUPT_SUMMARY;
	}		}

			/* Host software's Copy Engine configuration. */
			#define CE_ATTR_FLAGS 0

			/*
			* Configuration information for a Copy Engine pipe.
			* Passed from Host to Target during startup (one per CE).
			*
			* NOTE: Structure is shared between Host software and Target firmware!
			*/
			struct ce_pipe_config {
			__le32 pipenum;
			__le32 pipedir;
			__le32 nentries;
			__le32 nbytes_max;
			__le32 flags;
			__le32 reserved;
			};

			/*
			* Directions for interconnect pipe configuration.
			* These definitions may be used during configuration and are shared
			* between Host and Target.
			*
			* Pipe Directions are relative to the Host, so PIPEDIR_IN means
			* "coming IN over air through Target to Host" as with a WiFi Rx operation.
			* Conversely, PIPEDIR_OUT means "going OUT from Host through Target over air"
			* as with a WiFi Tx operation. This is somewhat awkward for the "middle-man"
			* Target since things that are "PIPEDIR_OUT" are coming IN to the Target
			* over the interconnect.
			*/
			#define PIPEDIR_NONE 0
			#define PIPEDIR_IN 1 /* Target-->Host, WiFi Rx direction */
			#define PIPEDIR_OUT 2 /* Host->Target, WiFi Tx direction */
			#define PIPEDIR_INOUT 3 /* bidirectional */

			/* Establish a mapping between a service/direction and a pipe. */
			struct service_to_pipe {
			__le32 service_id;
			__le32 pipedir;
			__le32 pipenum;
			};

	#endif /* _CE_H_ */		#endif /* _CE_H_ */

drivers/net/wireless/ath/ath10k/core.c

+15 −4

Original line number	Original line	Diff line number	Diff line
	@@ -41,10 +41,8 @@ static bool uart_print;
	static bool skip_otp;		static bool skip_otp;
	static bool rawmode;		static bool rawmode;

	/* Enable ATH10K_FW_CRASH_DUMP_REGISTERS and ATH10K_FW_CRASH_DUMP_CE_DATA		unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) \|
	* by default.		BIT(ATH10K_FW_CRASH_DUMP_CE_DATA);
	*/
	unsigned long ath10k_coredump_mask = 0x3;

	/* FIXME: most of these should be readonly */		/* FIXME: most of these should be readonly */
	module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);		module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
	@@ -82,6 +80,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.hw_ops = &qca988x_ops,		.hw_ops = &qca988x_ops,
	.decap_align_bytes = 4,		.decap_align_bytes = 4,
	.spectral_bin_discard = 0,		.spectral_bin_discard = 0,
			.spectral_bin_offset = 0,
	.vht160_mcs_rx_highest = 0,		.vht160_mcs_rx_highest = 0,
	.vht160_mcs_tx_highest = 0,		.vht160_mcs_tx_highest = 0,
	.n_cipher_suites = 8,		.n_cipher_suites = 8,
	@@ -113,6 +112,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.hw_ops = &qca988x_ops,		.hw_ops = &qca988x_ops,
	.decap_align_bytes = 4,		.decap_align_bytes = 4,
	.spectral_bin_discard = 0,		.spectral_bin_discard = 0,
			.spectral_bin_offset = 0,
	.vht160_mcs_rx_highest = 0,		.vht160_mcs_rx_highest = 0,
	.vht160_mcs_tx_highest = 0,		.vht160_mcs_tx_highest = 0,
	.n_cipher_suites = 8,		.n_cipher_suites = 8,
	@@ -145,6 +145,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.hw_ops = &qca988x_ops,		.hw_ops = &qca988x_ops,
	.decap_align_bytes = 4,		.decap_align_bytes = 4,
	.spectral_bin_discard = 0,		.spectral_bin_discard = 0,
			.spectral_bin_offset = 0,
	.vht160_mcs_rx_highest = 0,		.vht160_mcs_rx_highest = 0,
	.vht160_mcs_tx_highest = 0,		.vht160_mcs_tx_highest = 0,
	.n_cipher_suites = 8,		.n_cipher_suites = 8,
	@@ -176,6 +177,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.hw_ops = &qca988x_ops,		.hw_ops = &qca988x_ops,
	.decap_align_bytes = 4,		.decap_align_bytes = 4,
	.spectral_bin_discard = 0,		.spectral_bin_discard = 0,
			.spectral_bin_offset = 0,
	.vht160_mcs_rx_highest = 0,		.vht160_mcs_rx_highest = 0,
	.vht160_mcs_tx_highest = 0,		.vht160_mcs_tx_highest = 0,
	.n_cipher_suites = 8,		.n_cipher_suites = 8,
	@@ -207,6 +209,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.hw_ops = &qca988x_ops,		.hw_ops = &qca988x_ops,
	.decap_align_bytes = 4,		.decap_align_bytes = 4,
	.spectral_bin_discard = 0,		.spectral_bin_discard = 0,
			.spectral_bin_offset = 0,
	.vht160_mcs_rx_highest = 0,		.vht160_mcs_rx_highest = 0,
	.vht160_mcs_tx_highest = 0,		.vht160_mcs_tx_highest = 0,
	.n_cipher_suites = 8,		.n_cipher_suites = 8,
	@@ -238,6 +241,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.hw_ops = &qca988x_ops,		.hw_ops = &qca988x_ops,
	.decap_align_bytes = 4,		.decap_align_bytes = 4,
	.spectral_bin_discard = 0,		.spectral_bin_discard = 0,
			.spectral_bin_offset = 0,
	.vht160_mcs_rx_highest = 0,		.vht160_mcs_rx_highest = 0,
	.vht160_mcs_tx_highest = 0,		.vht160_mcs_tx_highest = 0,
	.n_cipher_suites = 8,		.n_cipher_suites = 8,
	@@ -272,6 +276,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.target_cpu_freq = 176000000,		.target_cpu_freq = 176000000,
	.decap_align_bytes = 4,		.decap_align_bytes = 4,
	.spectral_bin_discard = 0,		.spectral_bin_discard = 0,
			.spectral_bin_offset = 0,
	.vht160_mcs_rx_highest = 0,		.vht160_mcs_rx_highest = 0,
	.vht160_mcs_tx_highest = 0,		.vht160_mcs_tx_highest = 0,
	.n_cipher_suites = 8,		.n_cipher_suites = 8,
	@@ -309,6 +314,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.hw_ops = &qca99x0_ops,		.hw_ops = &qca99x0_ops,
	.decap_align_bytes = 1,		.decap_align_bytes = 1,
	.spectral_bin_discard = 4,		.spectral_bin_discard = 4,
			.spectral_bin_offset = 0,
	.vht160_mcs_rx_highest = 0,		.vht160_mcs_rx_highest = 0,
	.vht160_mcs_tx_highest = 0,		.vht160_mcs_tx_highest = 0,
	.n_cipher_suites = 11,		.n_cipher_suites = 11,
	@@ -347,6 +353,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.hw_ops = &qca99x0_ops,		.hw_ops = &qca99x0_ops,
	.decap_align_bytes = 1,		.decap_align_bytes = 1,
	.spectral_bin_discard = 12,		.spectral_bin_discard = 12,
			.spectral_bin_offset = 8,

	/* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz		/* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz
	* or 2x2 160Mhz, long-guard-interval.		* or 2x2 160Mhz, long-guard-interval.
	@@ -388,6 +395,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.hw_ops = &qca99x0_ops,		.hw_ops = &qca99x0_ops,
	.decap_align_bytes = 1,		.decap_align_bytes = 1,
	.spectral_bin_discard = 12,		.spectral_bin_discard = 12,
			.spectral_bin_offset = 8,

	/* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or		/* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or
	* 1x1 160Mhz, long-guard-interval.		* 1x1 160Mhz, long-guard-interval.
	@@ -423,6 +431,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.hw_ops = &qca988x_ops,		.hw_ops = &qca988x_ops,
	.decap_align_bytes = 4,		.decap_align_bytes = 4,
	.spectral_bin_discard = 0,		.spectral_bin_discard = 0,
			.spectral_bin_offset = 0,
	.vht160_mcs_rx_highest = 0,		.vht160_mcs_rx_highest = 0,
	.vht160_mcs_tx_highest = 0,		.vht160_mcs_tx_highest = 0,
	.n_cipher_suites = 8,		.n_cipher_suites = 8,
	@@ -456,6 +465,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.target_cpu_freq = 176000000,		.target_cpu_freq = 176000000,
	.decap_align_bytes = 4,		.decap_align_bytes = 4,
	.spectral_bin_discard = 0,		.spectral_bin_discard = 0,
			.spectral_bin_offset = 0,
	.vht160_mcs_rx_highest = 0,		.vht160_mcs_rx_highest = 0,
	.vht160_mcs_tx_highest = 0,		.vht160_mcs_tx_highest = 0,
	.n_cipher_suites = 8,		.n_cipher_suites = 8,
	@@ -494,6 +504,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
	.hw_ops = &qca99x0_ops,		.hw_ops = &qca99x0_ops,
	.decap_align_bytes = 1,		.decap_align_bytes = 1,
	.spectral_bin_discard = 4,		.spectral_bin_discard = 4,
			.spectral_bin_offset = 0,
	.vht160_mcs_rx_highest = 0,		.vht160_mcs_rx_highest = 0,
	.vht160_mcs_tx_highest = 0,		.vht160_mcs_tx_highest = 0,
	.n_cipher_suites = 11,		.n_cipher_suites = 11,

drivers/net/wireless/ath/ath10k/core.h

+2 −1

Original line number	Original line	Diff line number	Diff line
	@@ -48,7 +48,8 @@
	#define WMI_READY_TIMEOUT (5 * HZ)		#define WMI_READY_TIMEOUT (5 * HZ)
	#define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)		#define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)
	#define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)		#define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)
	#define ATH10K_NUM_CHANS 40		#define ATH10K_NUM_CHANS 41
			#define ATH10K_MAX_5G_CHAN 173

	/* Antenna noise floor */		/* Antenna noise floor */
	#define ATH10K_DEFAULT_NOISE_FLOOR -95		#define ATH10K_DEFAULT_NOISE_FLOOR -95

drivers/net/wireless/ath/ath10k/debug.c

+14 −7

Original line number	Original line	Diff line number	Diff line
	@@ -1727,7 +1727,9 @@ int ath10k_debug_start(struct ath10k *ar)
	ath10k_warn(ar, "failed to disable pktlog: %d\n", ret);		ath10k_warn(ar, "failed to disable pktlog: %d\n", ret);
	}		}

	if (ar->debug.nf_cal_period) {		if (ar->debug.nf_cal_period &&
			!test_bit(ATH10K_FW_FEATURE_NON_BMI,
			ar->normal_mode_fw.fw_file.fw_features)) {
	ret = ath10k_wmi_pdev_set_param(ar,		ret = ath10k_wmi_pdev_set_param(ar,
	ar->wmi.pdev_param->cal_period,		ar->wmi.pdev_param->cal_period,
	ar->debug.nf_cal_period);		ar->debug.nf_cal_period);
	@@ -1744,6 +1746,8 @@ void ath10k_debug_stop(struct ath10k *ar)
	{		{
	lockdep_assert_held(&ar->conf_mutex);		lockdep_assert_held(&ar->conf_mutex);

			if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
			ar->normal_mode_fw.fw_file.fw_features))
	ath10k_debug_cal_data_fetch(ar);		ath10k_debug_cal_data_fetch(ar);

	/* Must not use _sync to avoid deadlock, we do that in		/* Must not use _sync to avoid deadlock, we do that in
	@@ -2367,14 +2371,17 @@ int ath10k_debug_register(struct ath10k *ar)
	debugfs_create_file("fw_dbglog", 0600, ar->debug.debugfs_phy, ar,		debugfs_create_file("fw_dbglog", 0600, ar->debug.debugfs_phy, ar,
	&fops_fw_dbglog);		&fops_fw_dbglog);

			if (!test_bit(ATH10K_FW_FEATURE_NON_BMI,
			ar->normal_mode_fw.fw_file.fw_features)) {
	debugfs_create_file("cal_data", 0400, ar->debug.debugfs_phy, ar,		debugfs_create_file("cal_data", 0400, ar->debug.debugfs_phy, ar,
	&fops_cal_data);		&fops_cal_data);

	debugfs_create_file("ani_enable", 0600, ar->debug.debugfs_phy, ar,
	&fops_ani_enable);

	debugfs_create_file("nf_cal_period", 0600, ar->debug.debugfs_phy, ar,		debugfs_create_file("nf_cal_period", 0600, ar->debug.debugfs_phy, ar,
	&fops_nf_cal_period);		&fops_nf_cal_period);
			}

			debugfs_create_file("ani_enable", 0600, ar->debug.debugfs_phy, ar,
			&fops_ani_enable);

	if (IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED)) {		if (IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED)) {
	debugfs_create_file("dfs_simulate_radar", 0200, ar->debug.debugfs_phy,		debugfs_create_file("dfs_simulate_radar", 0200, ar->debug.debugfs_phy,