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Commit 4cc2350d authored by Asha Magadi Venkateshamurthy's avatar Asha Magadi Venkateshamurthy
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power: qcom: apm: add support for apm drivers 



Added apm drivers in order to keep backward compatibility
for cpr3 regulator. This snapshot is taken as of msm-4.4
'commit ae5acb1 (Merge "soc: msm-pcm: Add mutex lock to
protect prvt data")'.

Change-Id: If56c1ed27a901bc41c7b683b9aa29ee8f945e644
Signed-off-by: default avatarAsha Magadi Venkateshamurthy <amagad@codeaurora.org>
parent 2fed2b57

Documentation/devicetree/bindings/soc/qcom/apm.txt

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MSM Array Power Mux (msm-apm)



In some MSM designs, the CPU and caches contain logic which can be powered by

multiple rails. The APM controller exists to enable the selection of the power

rail supplying these arrays. Since a given supply may drop below the array

SRAM minimum operating voltage, the APM controller can be used to request a

switch to a power supply that will guarantee logic state retention.



Required properties

- compatible:	"qcom,msm-apm", "qcom,msm8996pro-apm", "qcom,msm8953-apm"

- reg:		Specifies physical base address and size of memory mapped regions

		containing the APM controller, APCS CSR, APC PLL controller, and

		SPM event registers.

- reg-names:	List of strings identifying the reg property entries. This list must

		contain: "pm-apcc-glb", "apcs-csr", "apc0-pll-ctl", "apc1-pll-ctl",

		"apc0-cpu0-spm", "apc0-cpu1-spm", "apc1-cpu0-spm", "apc1-cpu1-spm",

		"apc0-l2-spm", and "apc1-l2-spm".



Optional properties

- qcom,clock-source-override:	Specify this property to request a switch of the APC0 and APC1

				clock sources to GPLL0 before the APM switch begins and to

				switch back to the original clock source after the APM switch

				completes.

- qcom,apm-post-halt-delay:	The APM controller post halt delay counter value that SW needs

				to program one time before starting the APM HW controller for

				msm8953 target.

- qcom,apm-halt-clk-delay:	The APM controller halt clock delay counter value that SW

				needs to program one time before starting the APM HW controller

				for msm8953 target.

- qcom,apm-resume-clk-delay:	The APM controller resume clock delay counter value that SW

				needs to program one time before starting the APM HW controller

				for msm8953 target.

- qcom,apm-sel-switch-delay:	The APM controller switch selection delay counter value that SW

				needs to program one time before starting the APM HW controller

				for msm8953 target.



MSM APM Users



Required properties:

- qcom,apm-ctrl:		phandle of APM controller device node



Example:

	apc_apm: apm@099e0000 {

		compatible = "qcom,msm-apm";

		reg = <0x099e0000 0x1000>,

			<0x09820000 0x10000>,

			<0x06400050 0x8>,

			<0x06480050 0x8>,

			<0x09981068 0x8>,

			<0x09991068 0x8>,

			<0x099b1068 0x8>,

			<0x099c1068 0x8>,

			<0x099a1068 0x8>,

			<0x099d1068 0x8>;

		reg-names = "pm-apcc-glb",

				"apcs-csr",

				"apc0-pll-ctl",

				"apc1-pll-ctl",

				"apc0-cpu0-spm",

				"apc0-cpu1-spm",

				"apc1-cpu0-spm",

				"apc1-cpu1-spm",

				"apc0-l2-spm",

				"apc1-l2-spm";

		qcom,apm-post-halt-delay = <0x2>;

		qcom,apm-halt-clk-delay = <0x11>;

		qcom,apm-resume-clk-delay = <0x10>;

		qcom,apm-sel-switch-delay = <0x01>;



	foo_user {

		...

		qcom,apm-ctrl = <&apc_apm>;

	};

drivers/soc/qcom/Kconfig

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@@ -205,6 +205,14 @@ config QCOM_SMEM 
	  The driver provides an interface to items in a heap shared among all

	  processors in a Qualcomm platform.



config MSM_APM

	bool "Qualcomm Technologies, Inc. platform specific APM driver"

	help

	  Platform specific driver to manage the power source of

	  memory arrays. Interfaces with regulator drivers to ensure

	  SRAM Vmin requirements are met across different performance

	  levels.



config QCOM_SMD_RPM

	tristate "Qualcomm Resource Power Manager (RPM) over SMD"

	depends on ARCH_QCOM

drivers/soc/qcom/Makefile

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@@ -20,6 +20,7 @@ qmi_helpers-y += qmi_interface.o 
obj-$(CONFIG_QCOM_QMI_RMNET)	+= qmi_rmnet.o

obj-$(CONFIG_QCOM_QMI_DFC)	+= dfc_qmi.o dfc_qmap.o

obj-$(CONFIG_QCOM_QMI_POWER_COLLAPSE) += wda_qmi.o

obj-$(CONFIG_MSM_APM)          += apm.o

obj-$(CONFIG_QCOM_SMD_RPM)	+= smd-rpm.o

obj-$(CONFIG_QCOM_SMEM) +=	smem.o

obj-$(CONFIG_MSM_SPM) += msm-spm.o spm_devices.o

drivers/soc/qcom/apm.c

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include/soc/qcom/apm.h

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/*

 * Copyright (c) 2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#ifndef __LINUX_POWER_QCOM_APM_H__

#define __LINUX_POWER_QCOM_APM_H__



#include <linux/device.h>

#include <linux/err.h>



/**

 * enum msm_apm_supply - supported power rails to supply memory arrays

 * %MSM_APM_SUPPLY_APCC:	to enable selection of VDD_APCC rail as supply

 * %MSM_APM_SUPPLY_MX:		to enable selection of VDD_MX rail as supply

 */

enum msm_apm_supply {

	MSM_APM_SUPPLY_APCC,

	MSM_APM_SUPPLY_MX,

};



/* Handle used to identify an APM controller device  */

struct msm_apm_ctrl_dev;



#ifdef CONFIG_MSM_APM

struct msm_apm_ctrl_dev *msm_apm_ctrl_dev_get(struct device *dev);

int msm_apm_set_supply(struct msm_apm_ctrl_dev *ctrl_dev,

		       enum msm_apm_supply supply);

int msm_apm_get_supply(struct msm_apm_ctrl_dev *ctrl_dev);



#else

static inline struct msm_apm_ctrl_dev *msm_apm_ctrl_dev_get(struct device *dev)

{ return ERR_PTR(-EPERM); }

static inline int msm_apm_set_supply(struct msm_apm_ctrl_dev *ctrl_dev,

		       enum msm_apm_supply supply)

{ return -EPERM; }

static inline int msm_apm_get_supply(struct msm_apm_ctrl_dev *ctrl_dev)

{ return -EPERM; }

#endif

#endif