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Commit 4c153431 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
  [POWERPC] Fix return value from memcpy
  [POWERPC] iseries: Define insw et al. so libata/ide will compile
  [POWERPC] Fix irq enable/disable in smp_generic_take_timebase
  [POWERPC] Fix problem with time not advancing on 32-bit platforms
  [POWERPC] Restore copyright notice in arch/powerpc/kernel/fpu.S
  [POWERPC] Fix up ibm_architecture_vec definition
  [POWERPC] Make OF irq map code detect more error cases
  [POWERPC] Support for "weird" MPICs and fixup mpc7448_hpc2
  [POWERPC] Fix MPIC sense codes in documentation
  [POWERPC] Fix performance regression in IRQ radix tree locking
  [POWERPC] Add mpc7448hpc2 device tree source file
  [POWERPC] Add MPC8349E MDS device tree source file to arch/powerpc/boot/dts
  [POWERPC] modify mpc83xx platforms to use new IRQ layer
  [POWERPC] Adapt ipic driver to new host_ops interface, add set_irq_type to set IRQ sense
  [POWERPC] back up old school ipic.[hc] to arch/ppc
  [POWERPC] Use mpc8641hpcn PIC base address from dev tree.
  [POWERPC] Allow MPC8641 HPCN to build with CONFIG_PCI disabled too.
  [POWERPC] Fix powerpc 44x_mmu build
  [POWERPC] Remove flush_dcache_all export
parents eb36c288 d0027bf0
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+3 −3
Original line number Diff line number Diff line
@@ -1136,10 +1136,10 @@ Sense and level information should be encoded as follows:
   Devices connected to openPIC-compatible controllers should encode
   sense and polarity as follows:

	0 = high to low edge sensitive type enabled
	0 = low to high edge sensitive type enabled
	1 = active low level sensitive type enabled
	2 = low to high edge sensitive type enabled
	3 = active high level sensitive type enabled
	2 = active high level sensitive type enabled
	3 = high to low edge sensitive type enabled

   ISA PIC interrupt controllers should adhere to the ISA PIC
   encodings listed below:
+14 −6
Original line number Diff line number Diff line
@@ -354,6 +354,7 @@ endchoice
config PPC_PSERIES
	depends on PPC_MULTIPLATFORM && PPC64
	bool "IBM pSeries & new (POWER5-based) iSeries"
	select MPIC
	select PPC_I8259
	select PPC_RTAS
	select RTAS_ERROR_LOGGING
@@ -363,6 +364,7 @@ config PPC_PSERIES
config PPC_CHRP
	bool "Common Hardware Reference Platform (CHRP) based machines"
	depends on PPC_MULTIPLATFORM && PPC32
	select MPIC
	select PPC_I8259
	select PPC_INDIRECT_PCI
	select PPC_RTAS
@@ -373,6 +375,7 @@ config PPC_CHRP
config PPC_PMAC
	bool "Apple PowerMac based machines"
	depends on PPC_MULTIPLATFORM
	select MPIC
	select PPC_INDIRECT_PCI if PPC32
	select PPC_MPC106 if PPC32
	default y
@@ -380,6 +383,7 @@ config PPC_PMAC
config PPC_PMAC64
	bool
	depends on PPC_PMAC && POWER4
	select MPIC
	select U3_DART
	select MPIC_BROKEN_U3
	select GENERIC_TBSYNC
@@ -389,6 +393,7 @@ config PPC_PMAC64
config PPC_PREP
	bool "PowerPC Reference Platform (PReP) based machines"
	depends on PPC_MULTIPLATFORM && PPC32 && BROKEN
	select MPIC
	select PPC_I8259
	select PPC_INDIRECT_PCI
	select PPC_UDBG_16550
@@ -397,6 +402,7 @@ config PPC_PREP
config PPC_MAPLE
	depends on PPC_MULTIPLATFORM && PPC64
	bool "Maple 970FX Evaluation Board"
	select MPIC
	select U3_DART
	select MPIC_BROKEN_U3
	select GENERIC_TBSYNC
@@ -439,12 +445,6 @@ config U3_DART
	depends on PPC_MULTIPLATFORM && PPC64
	default n

config MPIC
	depends on PPC_PSERIES || PPC_PMAC || PPC_MAPLE || PPC_CHRP \
			       || MPC7448HPC2
	bool
	default y

config PPC_RTAS
	bool
	default n
@@ -812,6 +812,14 @@ config GENERIC_ISA_DMA
	depends on PPC64 || POWER4 || 6xx && !CPM2
	default y

config MPIC
	bool
	default n

config MPIC_WEIRD
	bool
	default n

config PPC_I8259
	bool
	default n
+190 −0
Original line number Diff line number Diff line
/*
 * MPC7448HPC2 (Taiga) board Device Tree Source
 *
 * Copyright 2006 Freescale Semiconductor Inc.
 * 2006 Roy Zang <Roy Zang at freescale.com>.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */


/ {
	model = "mpc7448hpc2";
	compatible = "mpc74xx";
	#address-cells = <1>;
	#size-cells = <1>;
	linux,phandle = <100>;

	cpus {
		#cpus = <1>;
		#address-cells = <1>;
		#size-cells =<0>;
		linux,phandle = <200>;
				
		PowerPC,7448@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <20>;	// 32 bytes
			i-cache-line-size = <20>;	// 32 bytes
			d-cache-size = <8000>;		// L1, 32K bytes
			i-cache-size = <8000>;		// L1, 32K bytes
			timebase-frequency = <0>;	// 33 MHz, from uboot
			clock-frequency = <0>;		// From U-Boot
			bus-frequency = <0>;		// From U-Boot
			32-bit;
			linux,phandle = <201>;
			linux,boot-cpu;
		};
	};

	memory {
		device_type = "memory";
		linux,phandle = <300>;
		reg = <00000000 20000000	// DDR2   512M at 0
		       >;
	};

  	tsi108@c0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		#interrupt-cells = <2>;
		device_type = "tsi-bridge";
		ranges = <00000000 c0000000 00010000>;
		reg = <c0000000 00010000>;
		bus-frequency = <0>;

		i2c@7000 {
			interrupt-parent = <7400>;
			interrupts = <E 0>;
			reg = <7000 400>;
			device_type = "i2c";
			compatible  = "tsi-i2c";
		};

		mdio@6000 {
			device_type = "mdio";
			compatible = "tsi-ethernet";

			ethernet-phy@6000 {
				linux,phandle = <6000>;
				interrupt-parent = <7400>;
				interrupts = <2 1>;
				reg = <6000 50>;
				phy-id = <8>;
				device_type = "ethernet-phy";
			};

			ethernet-phy@6400 {
				linux,phandle = <6400>;
				interrupt-parent = <7400>;
				interrupts = <2 1>;
				reg = <6000 50>;
				phy-id = <9>;
				device_type = "ethernet-phy";
			};

		};

		ethernet@6200 {
			#size-cells = <0>;
			device_type = "network";
			model = "TSI-ETH";
			compatible = "tsi-ethernet";
			reg = <6000 200>;
			address = [ 00 06 D2 00 00 01 ];
			interrupts = <10 2>;
			interrupt-parent = <7400>;
			phy-handle = <6000>;
		};

		ethernet@6600 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "TSI-ETH";
			compatible = "tsi-ethernet";
			reg = <6400 200>;
			address = [ 00 06 D2 00 00 02 ];
			interrupts = <11 2>;
			interrupt-parent = <7400>;
			phy-handle = <6400>;
		};

		serial@7808 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <7808 200>;
			clock-frequency = <3f6b5a00>;
			interrupts = <c 0>;
			interrupt-parent = <7400>;
		};

		serial@7c08 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <7c08 200>;
			clock-frequency = <3f6b5a00>;
			interrupts = <d 0>;
			interrupt-parent = <7400>;
		};

	  	pic@7400 {
			linux,phandle = <7400>;
			clock-frequency = <0>;
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <7400 400>;
			built-in;
			compatible = "chrp,open-pic";
			device_type = "open-pic";
                       	big-endian;
		};
		pci@1000 {
			compatible = "tsi10x";
			device_type = "pci";
			linux,phandle = <1000>;
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			reg = <1000 1000>;
			bus-range = <0 0>;
			ranges = <02000000 0 e0000000 e0000000 0 1A000000	
				  01000000 0 00000000 fa000000 0 00010000>;
			clock-frequency = <7f28154>;
			interrupt-parent = <7400>;
			interrupts = <17 2>;
			interrupt-map-mask = <f800 0 0 7>;
			interrupt-map = <

				/* IDSEL 0x11 */
				0800 0 0 1 7400 24 0
				0800 0 0 2 7400 25 0
				0800 0 0 3 7400 26 0
				0800 0 0 4 7400 27 0

				/* IDSEL 0x12 */
				1000 0 0 1 7400 25 0
				1000 0 0 2 7400 26 0
				1000 0 0 3 7400 27 0
				1000 0 0 4 7400 24 0

				/* IDSEL 0x13 */
				1800 0 0 1 7400 26 0
				1800 0 0 2 7400 27 0
				1800 0 0 3 7400 24 0
				1800 0 0 4 7400 25 0

				/* IDSEL 0x14 */
				2000 0 0 1 7400 27 0
				2000 0 0 2 7400 24 0
				2000 0 0 3 7400 25 0
				2000 0 0 4 7400 26 0
				>;
		};
	};

};
+328 −0
Original line number Diff line number Diff line
/*
 * MPC8349E MDS Device Tree Source
 *
 * Copyright 2005, 2006 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/ {
	model = "MPC8349EMDS";
	compatible = "MPC834xMDS";
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#cpus = <1>;
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,8349@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <20>;	// 32 bytes
			i-cache-line-size = <20>;	// 32 bytes
			d-cache-size = <8000>;		// L1, 32K
			i-cache-size = <8000>;		// L1, 32K
			timebase-frequency = <0>;	// from bootloader
			bus-frequency = <0>;		// from bootloader
			clock-frequency = <0>;		// from bootloader
			32-bit;
		};
	};

	memory {
		device_type = "memory";
		reg = <00000000 10000000>;	// 256MB at 0
	};

	soc8349@e0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		#interrupt-cells = <2>;
		device_type = "soc";
		ranges = <0 e0000000 00100000>;
		reg = <e0000000 00000200>;
		bus-frequency = <0>;

		wdt@200 {
			device_type = "watchdog";
			compatible = "mpc83xx_wdt";
			reg = <200 100>;
		};

		i2c@3000 {
			device_type = "i2c";
			compatible = "fsl-i2c";
			reg = <3000 100>;
			interrupts = <e 8>;
			interrupt-parent = <700>;
			dfsrr;
		};

		i2c@3100 {
			device_type = "i2c";
			compatible = "fsl-i2c";
			reg = <3100 100>;
			interrupts = <f 8>;
			interrupt-parent = <700>;
			dfsrr;
		};

		spi@7000 {
			device_type = "spi";
			compatible = "mpc83xx_spi";
			reg = <7000 1000>;
			interrupts = <10 8>;
			interrupt-parent = <700>;
			mode = <0>;
		};

		/* phy type (ULPI or SERIAL) are only types supportted for MPH */
		/* port = 0 or 1 */
		usb@22000 {
			device_type = "usb";
			compatible = "fsl-usb2-mph";
			reg = <22000 1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupt-parent = <700>;
			interrupts = <27 2>;
			phy_type = "ulpi";
			port1;
		};
		/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
		usb@23000 {
			device_type = "usb";
			compatible = "fsl-usb2-dr";
			reg = <23000 1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupt-parent = <700>;
			interrupts = <26 2>;
			phy_type = "ulpi";
		};

		mdio@24520 {
			device_type = "mdio";
			compatible = "gianfar";
			reg = <24520 20>;
			#address-cells = <1>;
			#size-cells = <0>;
			linux,phandle = <24520>;
			ethernet-phy@0 {
				linux,phandle = <2452000>;
				interrupt-parent = <700>;
				interrupts = <11 2>;
				reg = <0>;
				device_type = "ethernet-phy";
			};
			ethernet-phy@1 {
				linux,phandle = <2452001>;
				interrupt-parent = <700>;
				interrupts = <12 2>;
				reg = <1>;
				device_type = "ethernet-phy";
			};
		};

		ethernet@24000 {
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <24000 1000>;
			address = [ 00 00 00 00 00 00 ];
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <20 8 21 8 22 8>;
			interrupt-parent = <700>;
			phy-handle = <2452000>;
		};

		ethernet@25000 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "TSEC";
			compatible = "gianfar";
			reg = <25000 1000>;
			address = [ 00 00 00 00 00 00 ];
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <23 8 24 8 25 8>;
			interrupt-parent = <700>;
			phy-handle = <2452001>;
		};

		serial@4500 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <4500 100>;
			clock-frequency = <0>;
			interrupts = <9 8>;
			interrupt-parent = <700>;
		};

		serial@4600 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <4600 100>;
			clock-frequency = <0>;
			interrupts = <a 8>;
			interrupt-parent = <700>;
		};

		pci@8500 {
			interrupt-map-mask = <f800 0 0 7>;
			interrupt-map = <

					/* IDSEL 0x11 */
					 8800 0 0 1 700 14 8
					 8800 0 0 2 700 15 8
					 8800 0 0 3 700 16 8
					 8800 0 0 4 700 17 8

					/* IDSEL 0x12 */
					 9000 0 0 1 700 16 8
					 9000 0 0 2 700 17 8
					 9000 0 0 3 700 14 8
					 9000 0 0 4 700 15 8

					/* IDSEL 0x13 */
					 9800 0 0 1 700 17 8
					 9800 0 0 2 700 14 8
					 9800 0 0 3 700 15 8
					 9800 0 0 4 700 16 8

					/* IDSEL 0x15 */
					 a800 0 0 1 700 14 8
					 a800 0 0 2 700 15 8
					 a800 0 0 3 700 16 8
					 a800 0 0 4 700 17 8

					/* IDSEL 0x16 */
					 b000 0 0 1 700 17 8
					 b000 0 0 2 700 14 8
					 b000 0 0 3 700 15 8
					 b000 0 0 4 700 16 8

					/* IDSEL 0x17 */
					 b800 0 0 1 700 16 8
					 b800 0 0 2 700 17 8
					 b800 0 0 3 700 14 8
					 b800 0 0 4 700 15 8

					/* IDSEL 0x18 */
					 b000 0 0 1 700 15 8
					 b000 0 0 2 700 16 8
					 b000 0 0 3 700 17 8
					 b000 0 0 4 700 14 8>;
			interrupt-parent = <700>;
			interrupts = <42 8>;
			bus-range = <0 0>;
			ranges = <02000000 0 a0000000 a0000000 0 10000000
				  42000000 0 80000000 80000000 0 10000000
				  01000000 0 00000000 e2000000 0 00100000>;
			clock-frequency = <3f940aa>;
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			reg = <8500 100>;
			compatible = "83xx";
			device_type = "pci";
		};

		pci@8600 {
			interrupt-map-mask = <f800 0 0 7>;
			interrupt-map = <

					/* IDSEL 0x11 */
					 8800 0 0 1 700 14 8
					 8800 0 0 2 700 15 8
					 8800 0 0 3 700 16 8
					 8800 0 0 4 700 17 8

					/* IDSEL 0x12 */
					 9000 0 0 1 700 16 8
					 9000 0 0 2 700 17 8
					 9000 0 0 3 700 14 8
					 9000 0 0 4 700 15 8

					/* IDSEL 0x13 */
					 9800 0 0 1 700 17 8
					 9800 0 0 2 700 14 8
					 9800 0 0 3 700 15 8
					 9800 0 0 4 700 16 8

					/* IDSEL 0x15 */
					 a800 0 0 1 700 14 8
					 a800 0 0 2 700 15 8
					 a800 0 0 3 700 16 8
					 a800 0 0 4 700 17 8

					/* IDSEL 0x16 */
					 b000 0 0 1 700 17 8
					 b000 0 0 2 700 14 8
					 b000 0 0 3 700 15 8
					 b000 0 0 4 700 16 8

					/* IDSEL 0x17 */
					 b800 0 0 1 700 16 8
					 b800 0 0 2 700 17 8
					 b800 0 0 3 700 14 8
					 b800 0 0 4 700 15 8

					/* IDSEL 0x18 */
					 b000 0 0 1 700 15 8
					 b000 0 0 2 700 16 8
					 b000 0 0 3 700 17 8
					 b000 0 0 4 700 14 8>;
			interrupt-parent = <700>;
			interrupts = <42 8>;
			bus-range = <0 0>;
			ranges = <02000000 0 b0000000 b0000000 0 10000000
				  42000000 0 90000000 90000000 0 10000000
				  01000000 0 00000000 e2100000 0 00100000>;
			clock-frequency = <3f940aa>;
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			reg = <8600 100>;
			compatible = "83xx";
			device_type = "pci";
		};

		/* May need to remove if on a part without crypto engine */
		crypto@30000 {
			device_type = "crypto";
			model = "SEC2";
			compatible = "talitos";
			reg = <30000 10000>;
			interrupts = <b 8>;
			interrupt-parent = <700>;
			num-channels = <4>;
			channel-fifo-len = <18>;
			exec-units-mask = <0000007e>;
			/* desc mask is for rev2.0,
			 * we need runtime fixup for >2.0 */
			descriptor-types-mask = <01010ebf>;
		};

		/* IPIC
		 * interrupts cell = <intr #, sense>
		 * sense values match linux IORESOURCE_IRQ_* defines:
		 * sense == 8: Level, low assertion
		 * sense == 2: Edge, high-to-low change
		 */
		pic@700 {
			linux,phandle = <700>;
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <700 100>;
			built-in;
			device_type = "ipic";
		};
	};
};
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