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Commit 4b8b0ff6 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull irq fixes from Thomas Gleixner:
 "Three fixes for irq core and irq chip drivers:

   - Do not set the irq type if type is NONE.  Fixes a boot regression
     on various SoCs

   - Use the proper cpu for setting up the GIC target list.  Discovered
     by the cpumask debugging code.

   - A rather large fix for the MIPS-GIC so per cpu local interrupts
     work again.  This was discovered late because the code falls back
     to slower timers which use normal device interrupts"

* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/mips-gic: Fix local interrupts
  irqchip/gicv3: Silence noisy DEBUG_PER_CPU_MAPS warning
  genirq: Skip chained interrupt trigger setup if type is IRQ_TYPE_NONE
parents 0f265741 e875bd66

drivers/irqchip/irq-gic-v3.c

+4 −3
Original line number Diff line number Diff line
@@ -548,7 +548,7 @@ static int gic_starting_cpu(unsigned int cpu) 
static u16 gic_compute_target_list(int *base_cpu, const struct cpumask *mask,

				   unsigned long cluster_id)

{

	int cpu = *base_cpu;

	int next_cpu, cpu = *base_cpu;

	unsigned long mpidr = cpu_logical_map(cpu);

	u16 tlist = 0;
@@ -562,9 +562,10 @@ static u16 gic_compute_target_list(int *base_cpu, const struct cpumask *mask, 


		tlist |= 1 << (mpidr & 0xf);



		cpu = cpumask_next(cpu, mask);

		if (cpu >= nr_cpu_ids)

		next_cpu = cpumask_next(cpu, mask);

		if (next_cpu >= nr_cpu_ids)

			goto out;

		cpu = next_cpu;



		mpidr = cpu_logical_map(cpu);

drivers/irqchip/irq-mips-gic.c

+50 −55
Original line number Diff line number Diff line
@@ -638,27 +638,6 @@ static int gic_local_irq_domain_map(struct irq_domain *d, unsigned int virq, 
	if (!gic_local_irq_is_routable(intr))

		return -EPERM;



	/*

	 * HACK: These are all really percpu interrupts, but the rest

	 * of the MIPS kernel code does not use the percpu IRQ API for

	 * the CP0 timer and performance counter interrupts.

	 */

	switch (intr) {

	case GIC_LOCAL_INT_TIMER:

	case GIC_LOCAL_INT_PERFCTR:

	case GIC_LOCAL_INT_FDC:

		irq_set_chip_and_handler(virq,

					 &gic_all_vpes_local_irq_controller,

					 handle_percpu_irq);

		break;

	default:

		irq_set_chip_and_handler(virq,

					 &gic_local_irq_controller,

					 handle_percpu_devid_irq);

		irq_set_percpu_devid(virq);

		break;

	}



	spin_lock_irqsave(&gic_lock, flags);

	for (i = 0; i < gic_vpes; i++) {

		u32 val = GIC_MAP_TO_PIN_MSK | gic_cpu_pin;
@@ -724,16 +703,42 @@ static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq, 
	return 0;

}



static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq,

			      irq_hw_number_t hw)

static int gic_setup_dev_chip(struct irq_domain *d, unsigned int virq,

			      unsigned int hwirq)

{

	if (GIC_HWIRQ_TO_LOCAL(hw) < GIC_NUM_LOCAL_INTRS)

		return gic_local_irq_domain_map(d, virq, hw);

	struct irq_chip *chip;

	int err;



	if (hwirq >= GIC_SHARED_HWIRQ_BASE) {

		err = irq_domain_set_hwirq_and_chip(d, virq, hwirq,

						    &gic_level_irq_controller,

						    NULL);

	} else {

		switch (GIC_HWIRQ_TO_LOCAL(hwirq)) {

		case GIC_LOCAL_INT_TIMER:

		case GIC_LOCAL_INT_PERFCTR:

		case GIC_LOCAL_INT_FDC:

			/*

			 * HACK: These are all really percpu interrupts, but

			 * the rest of the MIPS kernel code does not use the

			 * percpu IRQ API for them.

			 */

			chip = &gic_all_vpes_local_irq_controller;

			irq_set_handler(virq, handle_percpu_irq);

			break;



	irq_set_chip_and_handler(virq, &gic_level_irq_controller,

				 handle_level_irq);

		default:

			chip = &gic_local_irq_controller;

			irq_set_handler(virq, handle_percpu_devid_irq);

			irq_set_percpu_devid(virq);

			break;

		}



	return gic_shared_irq_domain_map(d, virq, hw, 0);

		err = irq_domain_set_hwirq_and_chip(d, virq, hwirq,

						    chip, NULL);

	}



	return err;

}



static int gic_irq_domain_alloc(struct irq_domain *d, unsigned int virq,
@@ -744,15 +749,12 @@ static int gic_irq_domain_alloc(struct irq_domain *d, unsigned int virq, 
	int cpu, ret, i;



	if (spec->type == GIC_DEVICE) {

		/* verify that it doesn't conflict with an IPI irq */

		if (test_bit(spec->hwirq, ipi_resrv))

		/* verify that shared irqs don't conflict with an IPI irq */

		if ((spec->hwirq >= GIC_SHARED_HWIRQ_BASE) &&

		    test_bit(GIC_HWIRQ_TO_SHARED(spec->hwirq), ipi_resrv))

			return -EBUSY;



		hwirq = GIC_SHARED_TO_HWIRQ(spec->hwirq);



		return irq_domain_set_hwirq_and_chip(d, virq, hwirq,

						     &gic_level_irq_controller,

						     NULL);

		return gic_setup_dev_chip(d, virq, spec->hwirq);

	} else {

		base_hwirq = find_first_bit(ipi_resrv, gic_shared_intrs);

		if (base_hwirq == gic_shared_intrs) {
@@ -821,7 +823,6 @@ int gic_irq_domain_match(struct irq_domain *d, struct device_node *node, 
}



static const struct irq_domain_ops gic_irq_domain_ops = {

	.map = gic_irq_domain_map,

	.alloc = gic_irq_domain_alloc,

	.free = gic_irq_domain_free,

	.match = gic_irq_domain_match,
@@ -852,29 +853,20 @@ static int gic_dev_domain_alloc(struct irq_domain *d, unsigned int virq, 
	struct irq_fwspec *fwspec = arg;

	struct gic_irq_spec spec = {

		.type = GIC_DEVICE,

		.hwirq = fwspec->param[1],

	};

	int i, ret;

	bool is_shared = fwspec->param[0] == GIC_SHARED;



	if (is_shared) {

	if (fwspec->param[0] == GIC_SHARED)

		spec.hwirq = GIC_SHARED_TO_HWIRQ(fwspec->param[1]);

	else

		spec.hwirq = GIC_LOCAL_TO_HWIRQ(fwspec->param[1]);



	ret = irq_domain_alloc_irqs_parent(d, virq, nr_irqs, &spec);

	if (ret)

		return ret;

	}



	for (i = 0; i < nr_irqs; i++) {

		irq_hw_number_t hwirq;



		if (is_shared)

			hwirq = GIC_SHARED_TO_HWIRQ(spec.hwirq + i);

		else

			hwirq = GIC_LOCAL_TO_HWIRQ(spec.hwirq + i);



		ret = irq_domain_set_hwirq_and_chip(d, virq + i,

						    hwirq,

						    &gic_level_irq_controller,

						    NULL);

		ret = gic_setup_dev_chip(d, virq + i, spec.hwirq + i);

		if (ret)

			goto error;

	}
@@ -896,6 +888,9 @@ void gic_dev_domain_free(struct irq_domain *d, unsigned int virq, 
static void gic_dev_domain_activate(struct irq_domain *domain,

				    struct irq_data *d)

{

	if (GIC_HWIRQ_TO_LOCAL(d->hwirq) < GIC_NUM_LOCAL_INTRS)

		gic_local_irq_domain_map(domain, d->irq, d->hwirq);

	else

		gic_shared_irq_domain_map(domain, d->irq, d->hwirq, 0);

}

kernel/irq/chip.c

+6 −2
Original line number Diff line number Diff line
@@ -820,6 +820,8 @@ __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle, 
	desc->name = name;



	if (handle != handle_bad_irq && is_chained) {

		unsigned int type = irqd_get_trigger_type(&desc->irq_data);



		/*

		 * We're about to start this interrupt immediately,

		 * hence the need to set the trigger configuration.
@@ -828,8 +830,10 @@ __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle, 
		 * chained interrupt. Reset it immediately because we

		 * do know better.

		 */

		__irq_set_trigger(desc, irqd_get_trigger_type(&desc->irq_data));

		if (type != IRQ_TYPE_NONE) {

			__irq_set_trigger(desc, type);

			desc->handle_irq = handle;

		}



		irq_settings_set_noprobe(desc);

		irq_settings_set_norequest(desc);