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Commit 4b31f898 authored by Mukesh Ojha's avatar Mukesh Ojha Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Make wakegic as interrupt parent for subsystem on trinket



Each subsystem enroll with PIL framework, they register their interrupt
as wake up capable to APSS. The IRQCHIP_SKIP_SET_WAKE flag in the gic-v3
driver was missing which will give warning as "Unbalanced IRQ 19 wake
disable".

But, later after WakeGIC change in the DT and in the IRQCHIP_SKIP_SET_WAKE
flag set in mpm driver, this does not required to be set in gic-v3 driver.

If we make dt change by making wakegic as parent for the subsystem
interrupts to APSS, it will fix the warning.

Change-Id: I83a01cf27b452f6c66d8cb72d891e1ee42c954d0
Signed-off-by: default avatarMukesh Ojha <mojha@codeaurora.org>
parent 6e7c2de4
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+3 −3
Original line number Diff line number Diff line
@@ -1188,7 +1188,7 @@
		qcom,complete-ramdump;

		/* Inputs from mss */
		interrupts-extended = <&intc 0 307 1>,
		interrupts-extended = <&wakegic 0 307 1>,
				<&modem_smp2p_in 0 0>,
				<&modem_smp2p_in 2 0>,
				<&modem_smp2p_in 1 0>,
@@ -1312,7 +1312,7 @@
		qcom,complete-ramdump;

		/* Inputs from lpass */
		interrupts-extended = <&intc 0 396 1>,
		interrupts-extended = <&wakegic 0 396 1>,
				      <&adsp_smp2p_in 0 0>,
				      <&adsp_smp2p_in 2 0>,
				      <&adsp_smp2p_in 1 0>,
@@ -1352,7 +1352,7 @@
		qcom,complete-ramdump;

		/* Inputs from turing */
		interrupts-extended = <&intc 0 265 1>,
		interrupts-extended = <&wakegic 0 265 1>,
				      <&cdsp_smp2p_in 0 0>,
				      <&cdsp_smp2p_in 2 0>,
				      <&cdsp_smp2p_in 1 0>,