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Commit 4a732119 authored by Sunil Paidimarri's avatar Sunil Paidimarri
Browse files

ARM: dts: msm: Add STMMAC node for qcs405 



Add STMMAC node for qcs405.

Change-Id: I8d2c1dfc081bc547cb38959119486a6f19a96b4a
Acked-by: default avatarRahul Kawadgave <rahulak@qti.qualcomm.com>
Signed-off-by: default avatarSunil Paidimarri <hisunil@codeaurora.org>
parent 19dad3f7

arch/arm64/boot/dts/qcom/qcs405.dtsi

+146 −0
Original line number Diff line number Diff line
@@ -1548,6 +1548,152 @@ 
			< 1401600 MHZ_TO_MBPS( 710, 8) >;

	};



	mtl_rx_setup: rx-queues-config {

		snps,rx-queues-to-use = <4>;

		snps,rx-sched-sp;



		queue0 {

			snps,dcb-algorithm;

			snps,map-to-dma-channel = <0x0>;

			snps,route-up;

			snps,priority = <0x1>;

		};



		queue1 {

			snps,dcb-algorithm;

			snps,map-to-dma-channel = <0x1>;

			snps,route-ptp;

		};



		queue2 {

			snps,avb-algorithm;

			snps,map-to-dma-channel = <0x2>;

			snps,route-avcp;

		};



		queue3 {

			snps,avb-algorithm;

			snps,map-to-dma-channel = <0x3>;

			snps,priority = <0xC>;

		};

	};



	mtl_tx_setup: tx-queues-config {

		snps,tx-queues-to-use = <5>;

		snps,tx-sched-sp;

		queue0 {

			snps,dcb-algorithm;

		};



		queue1 {

			snps,dcb-algorithm;

		};



		queue2 {

			snps,avb-algorithm;

			snps,send_slope = <0x1000>;

			snps,idle_slope = <0x1000>;

			snps,high_credit = <0x3E800>;

			snps,low_credit = <0xFFC18000>;

		};



		queue3 {

			snps,avb-algorithm;

			snps,send_slope = <0x1000>;

			snps,idle_slope = <0x1000>;

			snps,high_credit = <0x3E800>;

			snps,low_credit = <0xFFC18000>;

		};

	};



	ethqos_hw: qcom,ethernet@00020000 {

		compatible = "qcom,stmmac-ethqos";

		reg = <0x07A80000 0x10000>,

			  <0x7A96000 0x100>;

		qcom,arm-smmu;

		reg-names = "stmmaceth", "rgmii";

		dma-bit-mask = <32>;

		emac-core-version = <0x20030000>;

		interrupts-extended = <&wakegic 0 56 4>, <&wakegic 0 55 4>,

			<&tlmm 61 2>, <&wakegic 0 300 4>,

			<&wakegic 0 301 4>, <&wakegic 0 302 4>,

			<&wakegic 0 303 4>, <&wakegic 0 304 4>,

			<&wakegic 0 305 4>, <&wakegic 0 306 4>,

			<&wakegic 0 307 4>, <&wakegic 0 308 4>;

		interrupt-names = "macirq", "eth_lpi",

			"phy-intr", "tx-ch0-intr",

			"tx-ch1-intr", "tx-ch2-intr",

			"tx-ch3-intr", "tx-ch4-intr",

			"rx-ch0-intr", "rx-ch1-intr",

			"rx-ch2-intr", "rx-ch3-intr";

		qcom,msm-bus,name = "emac";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <2>;

		qcom,msm-bus,vectors-KBps =

			<98 512 0 0>, <1 781 0 0>,  /* No vote */

			<98 512 2500 0>, <1 781 0 40000>,  /* 10Mbps vote */

			<98 512 25000 0>, <1 781 0 40000>,  /* 100Mbps vote */

			<98 512 250000 0>, <1 781 0 40000>; /* 1000Mbps vote */

		qcom,bus-vector-names = "0", "10", "100", "1000";

		snps,tso;

		snps,pbl = <32>;

		mac-address = [00 55 7B B5 7D f7];

		clocks = <&clock_gcc GCC_ETH_AXI_CLK>,

			<&clock_gcc GCC_ETH_SLAVE_AHB_CLK>,

			<&clock_gcc GCC_ETH_PTP_CLK>,

			<&clock_gcc GCC_ETH_RGMII_CLK>;

		clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";

		snps,ptp-ref-clk-rate = <230400000>;

		snps,ptp-req-clk-rate = <57600000>;

		snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_HIGH>;

		qcom,phy-intr-redirect = <&tlmm 61 GPIO_ACTIVE_LOW>;

		/*gdsc_emac-supply = <&emac_gdsc>;*/

		rx-fifo-depth = <16384>;

		tx-fifo-depth = <20480>;

		snps,mtl-rx-config = <&mtl_rx_setup>;

		snps,mtl-tx-config = <&mtl_tx_setup>;



		pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",

		"dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state",

		"dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state",

		"dev-emac-rgmii_txc_state",  "dev-emac-rgmii_tx_ctl_state",

		"dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state",

		"dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state",

		"dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state",

		"dev-emac-phy_intr";



		pinctrl-0 = <&emac_mdc>;

		pinctrl-1 = <&emac_mdio>;

		pinctrl-2 = <&emac_rgmii_txd0>;

		pinctrl-3 = <&emac_rgmii_txd1>;

		pinctrl-4 = <&emac_rgmii_txd2>;

		pinctrl-5 = <&emac_rgmii_txd3>;

		pinctrl-6 = <&emac_rgmii_txc>;

		pinctrl-7 = <&emac_rgmii_tx_ctl>;

		pinctrl-8 = <&emac_rgmii_rxd0>;

		pinctrl-9 = <&emac_rgmii_rxd1>;

		pinctrl-10 = <&emac_rgmii_rxd2>;

		pinctrl-11 = <&emac_rgmii_rxd3>;

		pinctrl-12 = <&emac_rgmii_rxc>;

		pinctrl-13 = <&emac_rgmii_rx_ctl>;

		pinctrl-14 = <&emac_phy_intr>;



		snps,reset-active-low;

		snps,reset-delays-us = <0 10000 100000>;

		phy-mode = "rgmii";



		io-macro-info {

			io-macro-bypass-mode = <0>;

			io-interface = "rgmii";

		};



		ethqos_emb_smmu: ethqos_emb_smmu {

			compatible = "qcom,emac-smmu-embedded";

			iommus = <&apps_smmu 0x1400 0x0>;

			qcom,iova-mapping = <0x80000000 0x40000000>;

		};

	};



	emac_hw: qcom,emac@07A80000 {

		compatible = "qcom,emac-dwc-eqos";

		reg = <0x07A80000 0x10000>,

arch/arm64/boot/dts/qcom/sa2150p-ccard.dtsi

+17 −0
Original line number Diff line number Diff line
@@ -192,6 +192,23 @@ 
	extcon = <&usb2_extcon>;

};



&ethqos_hw {

	status = "okay";

	vreg_emac_phy-supply = <&vreg_emac_phy>;

	vreg_rgmii_io_pads-supply = <&vreg_rgmii_io_pads>;

	rxc-skew-ps = <0>;



	pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",

		"dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state",

		"dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state",

		"dev-emac-rgmii_txc_state",  "dev-emac-rgmii_tx_ctl_state",

		"dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state",

		"dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state",

		"dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state",

		"dev-emac-phy_intr", "dev-emac-phy_reset_state";

	pinctrl-15 = <&emac_phy_reset_state>;

};



&emac_hw {

	status = "okay";

	vreg_emac_phy-supply = <&vreg_emac_phy>;