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Commit 4a7093b9 authored by Ping-Ke Shih's avatar Ping-Ke Shih Committed by Kalle Valo
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rtlwifi: Extend tx_power_by_rate_offset size for newer IC 



In older design, the TX power is grouped into rate section (smaller array
size), but new design groups them into rate (larger array size). Thus,
we extend the size for both cases, and add compile time assertion.

Signed-off-by: default avatarPing-Ke Shih <pkshih@realtek.com>
Acked-by: default avatarLarry Finger <Larry.Finger@lwfinger.net>
Signed-off-by: default avatarKalle Valo <kvalo@codeaurora.org>
parent 5f380cef

drivers/net/wireless/realtek/rtlwifi/base.c

+2 −0
Original line number Diff line number Diff line
@@ -2646,6 +2646,8 @@ EXPORT_SYMBOL_GPL(rtl_global_var); 


static int __init rtl_core_module_init(void)

{

	BUILD_BUG_ON(TX_PWR_BY_RATE_NUM_RATE < TX_PWR_BY_RATE_NUM_SECTION);



	if (rtl_rate_control_register())

		pr_err("rtl: Unable to register rtl_rc, use default RC !!\n");

drivers/net/wireless/realtek/rtlwifi/wifi.h

+2 −1
Original line number Diff line number Diff line
@@ -174,6 +174,7 @@ enum rtl8192c_h2c_cmd { 
#define TX_PWR_BY_RATE_NUM_BAND		2

#define TX_PWR_BY_RATE_NUM_RF		4

#define TX_PWR_BY_RATE_NUM_SECTION	12

#define TX_PWR_BY_RATE_NUM_RATE		84 /* >= TX_PWR_BY_RATE_NUM_SECTION */

#define MAX_BASE_NUM_IN_PHY_REG_PG_24G  6

#define MAX_BASE_NUM_IN_PHY_REG_PG_5G	5
@@ -1286,7 +1287,7 @@ struct rtl_phy { 
	u32 tx_power_by_rate_offset[TX_PWR_BY_RATE_NUM_BAND]

				   [TX_PWR_BY_RATE_NUM_RF]

				   [TX_PWR_BY_RATE_NUM_RF]

				   [TX_PWR_BY_RATE_NUM_SECTION];

				   [TX_PWR_BY_RATE_NUM_RATE];

	u8 txpwr_by_rate_base_24g[TX_PWR_BY_RATE_NUM_RF]

				 [TX_PWR_BY_RATE_NUM_RF]

				 [MAX_BASE_NUM_IN_PHY_REG_PG_24G];