Loading drivers/video/fbdev/msm/Makefile +2 −1 Original line number Diff line number Diff line Loading @@ -28,6 +28,7 @@ obj-$(CONFIG_FB_MSM_MDSS) += mdss_mdp_debug.o mdss-mdp-objs += mdss_mdp_pp_v1_7.o mdss-mdp-objs += mdss_mdp_pp_v3.o mdss-mdp-objs += mdss_mdp_pp_common.o mdss-mdp-objs += mdss_mdp_pp_stub.o ifeq ($(CONFIG_FB_MSM_MDSS),y) obj-$(CONFIG_DEBUG_FS) += mdss_debug.o mdss_debug_xlog.o Loading @@ -41,7 +42,7 @@ mdss-dsi-objs := mdss_dsi.o mdss_dsi_host.o mdss_dsi_cmd.o mdss_dsi_status.o mdss-dsi-objs += mdss_dsi_panel.o mdss-dsi-objs += msm_mdss_io_8974.o mdss-dsi-objs += mdss_dsi_phy.o mdss-dsi-objs += mdss_dsi_phy_12nm.o mdss-dsi-objs += mdss_dsi_phy_v3.o mdss-dsi-objs += mdss_dsi_clk.o obj-$(CONFIG_FB_MSM_MDSS) += mdss-dsi.o obj-$(CONFIG_FB_MSM_MDSS) += mdss_panel.o Loading drivers/video/fbdev/msm/dsi_status_6g.c +20 −18 Original line number Diff line number Diff line /* Copyright (c) 2013-2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2013-2018, 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -14,7 +14,6 @@ #include <linux/delay.h> #include <linux/kobject.h> #include <linux/sysfs.h> #include <linux/interrupt.h> #include "mdss_dsi.h" #include "mdss_mdp.h" Loading @@ -24,7 +23,7 @@ * mdss_check_te_status() - Check the status of panel for TE based ESD. * @ctrl_pdata : dsi controller data * @pstatus_data : dsi status data * @interval : duration in milliseconds for panel TE wait * @interval : duration in milliseconds to schedule work queue * * This function is called when the TE signal from the panel doesn't arrive * after 'interval' milliseconds. If the TE IRQ is not ready, the workqueue Loading @@ -35,14 +34,21 @@ static bool mdss_check_te_status(struct mdss_dsi_ctrl_pdata *ctrl_pdata, { bool ret; atomic_set(&ctrl_pdata->te_irq_ready, 0); reinit_completion(&ctrl_pdata->te_irq_comp); enable_irq(gpio_to_irq(ctrl_pdata->disp_te_gpio)); /* Define TE interrupt timeout value as 3x(1/fps) */ ret = wait_for_completion_timeout(&ctrl_pdata->te_irq_comp, /* * During resume, the panel status will be ON but due to race condition * between ESD thread and display UNBLANK (or rather can be put as * asynchronuous nature between these two threads), the ESD thread might * reach this point before the TE IRQ line is enabled or before the * first TE interrupt arrives after the TE IRQ line is enabled. For such * cases, re-schedule the ESD thread. */ ret = !atomic_read(&ctrl_pdata->te_irq_ready); if (ret) { schedule_delayed_work(&pstatus_data->check_status, msecs_to_jiffies(interval)); disable_irq(gpio_to_irq(ctrl_pdata->disp_te_gpio)); pr_debug("%s: Panel TE check done with ret = %d\n", __func__, ret); pr_debug("%s: TE IRQ line not enabled yet\n", __func__); } return ret; } Loading Loading @@ -105,17 +111,13 @@ void mdss_check_dsi_ctrl_status(struct work_struct *work, uint32_t interval) } if (ctrl_pdata->status_mode == ESD_TE) { uint32_t fps = mdss_panel_get_framerate(&pdata->panel_info, FPS_RESOLUTION_HZ); uint32_t timeout = ((1000 / fps) + 1) * MDSS_STATUS_TE_WAIT_MAX; if (mdss_check_te_status(ctrl_pdata, pstatus_data, timeout)) goto sim; if (mdss_check_te_status(ctrl_pdata, pstatus_data, interval)) return; else goto status_dead; } /* * TODO: Because mdss_dsi_cmd_mdp_busy has made sure DMA to * be idle in mdss_dsi_cmdlist_commit, it is not necessary Loading Loading @@ -173,7 +175,7 @@ void mdss_check_dsi_ctrl_status(struct work_struct *work, uint32_t interval) else goto status_dead; } sim: if (pdata->panel_info.panel_force_dead) { pr_debug("force_dead=%d\n", pdata->panel_info.panel_force_dead); pdata->panel_info.panel_force_dead--; Loading drivers/video/fbdev/msm/dsi_status_v2.c +2 −3 Original line number Diff line number Diff line /* Copyright (c) 2013-2015, 2017-2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2013-2015, 2017-2018, 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -119,8 +119,7 @@ void mdp3_check_dsi_ctrl_status(struct work_struct *work, if (mipi->mode == DSI_CMD_MODE && mipi->hw_vsync_mode && mdss_dsi_is_te_based_esd(ctrl_pdata)) { uint32_t fps = mdss_panel_get_framerate(&pdata->panel_info, FPS_RESOLUTION_HZ); uint32_t fps = mdss_panel_get_framerate(&pdata->panel_info); uint32_t timeout = ((1000 / fps) + 1) * MDSS_STATUS_TE_WAIT_MAX; Loading drivers/video/fbdev/msm/mdss.h +34 −15 Original line number Diff line number Diff line Loading @@ -27,6 +27,7 @@ #include <linux/msm-bus.h> #include <linux/file.h> #include <linux/dma-direction.h> #include <soc/qcom/cx_ipeak.h> #include <linux/dma-buf.h> #include "mdss_panel.h" Loading Loading @@ -166,8 +167,9 @@ enum mdss_hw_quirk { MDSS_QUIRK_FMT_PACK_PATTERN, MDSS_QUIRK_NEED_SECURE_MAP, MDSS_QUIRK_SRC_SPLIT_ALWAYS, MDSS_QUIRK_HDR_SUPPORT_ENABLED, MDSS_QUIRK_MMSS_GDSC_COLLAPSE, MDSS_QUIRK_MDP_CLK_SET_RATE, MDSS_QUIRK_HDR_SUPPORT_ENABLED, MDSS_QUIRK_MAX, }; Loading @@ -179,6 +181,9 @@ enum mdss_hw_capabilities { MDSS_CAPS_QSEED3, MDSS_CAPS_DEST_SCALER, MDSS_CAPS_10_BIT_SUPPORTED, MDSS_CAPS_CWB_SUPPORTED, MDSS_CAPS_MDP_VOTE_CLK_NOT_SUPPORTED, MDSS_CAPS_AVR_SUPPORTED, MDSS_CAPS_SEC_DETACH_SMMU, MDSS_CAPS_MAX, }; Loading @@ -194,6 +199,8 @@ enum mdss_qos_settings { MDSS_QOS_TS_PREFILL, MDSS_QOS_REMAPPER, MDSS_QOS_IB_NOCR, MDSS_QOS_WB2_WRITE_GATHER_EN, MDSS_QOS_WB_QOS, MDSS_QOS_MAX, }; Loading @@ -206,6 +213,15 @@ enum mdss_mdp_pipe_type { MDSS_MDP_PIPE_TYPE_MAX, }; enum mdss_mdp_intf_index { MDSS_MDP_NO_INTF, MDSS_MDP_INTF0, MDSS_MDP_INTF1, MDSS_MDP_INTF2, MDSS_MDP_INTF3, MDSS_MDP_MAX_INTF }; struct reg_bus_client { char name[MAX_CLIENT_NAME_LEN]; short usecase_ndx; Loading @@ -219,9 +235,9 @@ struct mdss_smmu_client { struct dss_module_power mp; struct reg_bus_client *reg_bus_clt; bool domain_attached; bool domain_reattach; bool handoff_pending; char __iomem *mmu_base; int domain; void __iomem *mmu_base; struct list_head _client; }; Loading Loading @@ -281,22 +297,21 @@ struct mdss_smmu_ops { void (*smmu_dsi_unmap_buffer)(dma_addr_t dma_addr, int domain, unsigned long size, int dir); void (*smmu_deinit)(struct mdss_data_type *mdata); struct sg_table * (*smmu_sg_table_clone)(struct sg_table *orig_table, gfp_t gfp_mask, bool padding); }; struct mdss_data_type { u32 mdp_rev; struct clk *mdp_clk[MDSS_MAX_CLK]; struct regulator *fs; struct regulator *venus; struct regulator *core_gdsc; struct regulator *vdd_cx; u32 vdd_cx_min_uv; u32 vdd_cx_max_uv; bool batfet_required; struct regulator *batfet; bool en_svs_high; u32 max_mdp_clk_rate; struct mdss_util_intf *mdss_util; struct mdss_panel_data *pdata; unsigned long mdp_clk_rate; struct platform_device *pdev; Loading Loading @@ -354,6 +369,8 @@ struct mdss_data_type { u32 default_ot_wr_limit; struct irq_domain *irq_domain; u32 *mdp_irq_raw; u32 *mdp_irq_export; u32 *mdp_irq_mask; u32 mdp_hist_irq_mask; u32 mdp_intf_irq_mask; Loading Loading @@ -406,8 +423,6 @@ struct mdss_data_type { u32 *vbif_rt_qos; u32 *vbif_nrt_qos; u32 npriority_lvl; u32 rot_dwnscale_min; u32 rot_dwnscale_max; struct mult_factor ab_factor; struct mult_factor ib_factor; Loading Loading @@ -483,6 +498,7 @@ struct mdss_data_type { int iommu_attached; u32 dbg_bus_flags; struct debug_bus *dbg_bus; u32 dbg_bus_size; struct vbif_debug_bus *vbif_dbg_bus; Loading Loading @@ -531,13 +547,15 @@ struct mdss_data_type { u32 bcolor2; struct mdss_scaler_block *scaler_off; u32 splash_intf_sel; u32 splash_split_disp; struct mult_factor bus_throughput_factor; u32 max_dest_scaler_input_width; u32 max_dest_scaler_output_width; struct mdss_mdp_destination_scaler *ds; u32 sec_disp_en; u32 sec_cam_en; u32 sec_session_cnt; wait_queue_head_t secure_waitq; struct cx_ipeak_client *mdss_cx_ipeak; struct mult_factor bus_throughput_factor; }; extern struct mdss_data_type *mdss_res; Loading Loading @@ -581,14 +599,15 @@ struct mdss_util_intf { int (*iommu_ctrl)(int enable); void (*iommu_lock)(void); void (*iommu_unlock)(void); void (*vbif_reg_lock)(void); void (*vbif_reg_unlock)(void); int (*secure_session_ctrl)(int enable); void (*bus_bandwidth_ctrl)(int enable); int (*bus_scale_set_quota)(int client, u64 ab_quota, u64 ib_quota); int (*panel_intf_status)(u32 disp_num, u32 intf_type); struct mdss_panel_cfg* (*panel_intf_type)(int intf_val); int (*dyn_clk_gating_ctrl)(int enable); bool (*param_check)(char *param_string); bool display_disabled; bool (*mdp_handoff_pending)(void); }; struct mdss_util_intf *mdss_get_util_intf(void); Loading drivers/video/fbdev/msm/mdss_cec_core.c +2 −2 Original line number Diff line number Diff line /* Copyright (c) 2015-2016, 2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2018, 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -700,7 +700,7 @@ static ssize_t cec_wta_msg(struct device *dev, } spin_unlock_irqrestore(&ctl->lock, flags); if (msg->frame_size > MAX_OPERAND_SIZE) { if (msg->frame_size > MAX_CEC_FRAME_SIZE) { pr_err("msg frame too big!\n"); ret = -EINVAL; goto end; Loading Loading
drivers/video/fbdev/msm/Makefile +2 −1 Original line number Diff line number Diff line Loading @@ -28,6 +28,7 @@ obj-$(CONFIG_FB_MSM_MDSS) += mdss_mdp_debug.o mdss-mdp-objs += mdss_mdp_pp_v1_7.o mdss-mdp-objs += mdss_mdp_pp_v3.o mdss-mdp-objs += mdss_mdp_pp_common.o mdss-mdp-objs += mdss_mdp_pp_stub.o ifeq ($(CONFIG_FB_MSM_MDSS),y) obj-$(CONFIG_DEBUG_FS) += mdss_debug.o mdss_debug_xlog.o Loading @@ -41,7 +42,7 @@ mdss-dsi-objs := mdss_dsi.o mdss_dsi_host.o mdss_dsi_cmd.o mdss_dsi_status.o mdss-dsi-objs += mdss_dsi_panel.o mdss-dsi-objs += msm_mdss_io_8974.o mdss-dsi-objs += mdss_dsi_phy.o mdss-dsi-objs += mdss_dsi_phy_12nm.o mdss-dsi-objs += mdss_dsi_phy_v3.o mdss-dsi-objs += mdss_dsi_clk.o obj-$(CONFIG_FB_MSM_MDSS) += mdss-dsi.o obj-$(CONFIG_FB_MSM_MDSS) += mdss_panel.o Loading
drivers/video/fbdev/msm/dsi_status_6g.c +20 −18 Original line number Diff line number Diff line /* Copyright (c) 2013-2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2013-2018, 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -14,7 +14,6 @@ #include <linux/delay.h> #include <linux/kobject.h> #include <linux/sysfs.h> #include <linux/interrupt.h> #include "mdss_dsi.h" #include "mdss_mdp.h" Loading @@ -24,7 +23,7 @@ * mdss_check_te_status() - Check the status of panel for TE based ESD. * @ctrl_pdata : dsi controller data * @pstatus_data : dsi status data * @interval : duration in milliseconds for panel TE wait * @interval : duration in milliseconds to schedule work queue * * This function is called when the TE signal from the panel doesn't arrive * after 'interval' milliseconds. If the TE IRQ is not ready, the workqueue Loading @@ -35,14 +34,21 @@ static bool mdss_check_te_status(struct mdss_dsi_ctrl_pdata *ctrl_pdata, { bool ret; atomic_set(&ctrl_pdata->te_irq_ready, 0); reinit_completion(&ctrl_pdata->te_irq_comp); enable_irq(gpio_to_irq(ctrl_pdata->disp_te_gpio)); /* Define TE interrupt timeout value as 3x(1/fps) */ ret = wait_for_completion_timeout(&ctrl_pdata->te_irq_comp, /* * During resume, the panel status will be ON but due to race condition * between ESD thread and display UNBLANK (or rather can be put as * asynchronuous nature between these two threads), the ESD thread might * reach this point before the TE IRQ line is enabled or before the * first TE interrupt arrives after the TE IRQ line is enabled. For such * cases, re-schedule the ESD thread. */ ret = !atomic_read(&ctrl_pdata->te_irq_ready); if (ret) { schedule_delayed_work(&pstatus_data->check_status, msecs_to_jiffies(interval)); disable_irq(gpio_to_irq(ctrl_pdata->disp_te_gpio)); pr_debug("%s: Panel TE check done with ret = %d\n", __func__, ret); pr_debug("%s: TE IRQ line not enabled yet\n", __func__); } return ret; } Loading Loading @@ -105,17 +111,13 @@ void mdss_check_dsi_ctrl_status(struct work_struct *work, uint32_t interval) } if (ctrl_pdata->status_mode == ESD_TE) { uint32_t fps = mdss_panel_get_framerate(&pdata->panel_info, FPS_RESOLUTION_HZ); uint32_t timeout = ((1000 / fps) + 1) * MDSS_STATUS_TE_WAIT_MAX; if (mdss_check_te_status(ctrl_pdata, pstatus_data, timeout)) goto sim; if (mdss_check_te_status(ctrl_pdata, pstatus_data, interval)) return; else goto status_dead; } /* * TODO: Because mdss_dsi_cmd_mdp_busy has made sure DMA to * be idle in mdss_dsi_cmdlist_commit, it is not necessary Loading Loading @@ -173,7 +175,7 @@ void mdss_check_dsi_ctrl_status(struct work_struct *work, uint32_t interval) else goto status_dead; } sim: if (pdata->panel_info.panel_force_dead) { pr_debug("force_dead=%d\n", pdata->panel_info.panel_force_dead); pdata->panel_info.panel_force_dead--; Loading
drivers/video/fbdev/msm/dsi_status_v2.c +2 −3 Original line number Diff line number Diff line /* Copyright (c) 2013-2015, 2017-2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2013-2015, 2017-2018, 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -119,8 +119,7 @@ void mdp3_check_dsi_ctrl_status(struct work_struct *work, if (mipi->mode == DSI_CMD_MODE && mipi->hw_vsync_mode && mdss_dsi_is_te_based_esd(ctrl_pdata)) { uint32_t fps = mdss_panel_get_framerate(&pdata->panel_info, FPS_RESOLUTION_HZ); uint32_t fps = mdss_panel_get_framerate(&pdata->panel_info); uint32_t timeout = ((1000 / fps) + 1) * MDSS_STATUS_TE_WAIT_MAX; Loading
drivers/video/fbdev/msm/mdss.h +34 −15 Original line number Diff line number Diff line Loading @@ -27,6 +27,7 @@ #include <linux/msm-bus.h> #include <linux/file.h> #include <linux/dma-direction.h> #include <soc/qcom/cx_ipeak.h> #include <linux/dma-buf.h> #include "mdss_panel.h" Loading Loading @@ -166,8 +167,9 @@ enum mdss_hw_quirk { MDSS_QUIRK_FMT_PACK_PATTERN, MDSS_QUIRK_NEED_SECURE_MAP, MDSS_QUIRK_SRC_SPLIT_ALWAYS, MDSS_QUIRK_HDR_SUPPORT_ENABLED, MDSS_QUIRK_MMSS_GDSC_COLLAPSE, MDSS_QUIRK_MDP_CLK_SET_RATE, MDSS_QUIRK_HDR_SUPPORT_ENABLED, MDSS_QUIRK_MAX, }; Loading @@ -179,6 +181,9 @@ enum mdss_hw_capabilities { MDSS_CAPS_QSEED3, MDSS_CAPS_DEST_SCALER, MDSS_CAPS_10_BIT_SUPPORTED, MDSS_CAPS_CWB_SUPPORTED, MDSS_CAPS_MDP_VOTE_CLK_NOT_SUPPORTED, MDSS_CAPS_AVR_SUPPORTED, MDSS_CAPS_SEC_DETACH_SMMU, MDSS_CAPS_MAX, }; Loading @@ -194,6 +199,8 @@ enum mdss_qos_settings { MDSS_QOS_TS_PREFILL, MDSS_QOS_REMAPPER, MDSS_QOS_IB_NOCR, MDSS_QOS_WB2_WRITE_GATHER_EN, MDSS_QOS_WB_QOS, MDSS_QOS_MAX, }; Loading @@ -206,6 +213,15 @@ enum mdss_mdp_pipe_type { MDSS_MDP_PIPE_TYPE_MAX, }; enum mdss_mdp_intf_index { MDSS_MDP_NO_INTF, MDSS_MDP_INTF0, MDSS_MDP_INTF1, MDSS_MDP_INTF2, MDSS_MDP_INTF3, MDSS_MDP_MAX_INTF }; struct reg_bus_client { char name[MAX_CLIENT_NAME_LEN]; short usecase_ndx; Loading @@ -219,9 +235,9 @@ struct mdss_smmu_client { struct dss_module_power mp; struct reg_bus_client *reg_bus_clt; bool domain_attached; bool domain_reattach; bool handoff_pending; char __iomem *mmu_base; int domain; void __iomem *mmu_base; struct list_head _client; }; Loading Loading @@ -281,22 +297,21 @@ struct mdss_smmu_ops { void (*smmu_dsi_unmap_buffer)(dma_addr_t dma_addr, int domain, unsigned long size, int dir); void (*smmu_deinit)(struct mdss_data_type *mdata); struct sg_table * (*smmu_sg_table_clone)(struct sg_table *orig_table, gfp_t gfp_mask, bool padding); }; struct mdss_data_type { u32 mdp_rev; struct clk *mdp_clk[MDSS_MAX_CLK]; struct regulator *fs; struct regulator *venus; struct regulator *core_gdsc; struct regulator *vdd_cx; u32 vdd_cx_min_uv; u32 vdd_cx_max_uv; bool batfet_required; struct regulator *batfet; bool en_svs_high; u32 max_mdp_clk_rate; struct mdss_util_intf *mdss_util; struct mdss_panel_data *pdata; unsigned long mdp_clk_rate; struct platform_device *pdev; Loading Loading @@ -354,6 +369,8 @@ struct mdss_data_type { u32 default_ot_wr_limit; struct irq_domain *irq_domain; u32 *mdp_irq_raw; u32 *mdp_irq_export; u32 *mdp_irq_mask; u32 mdp_hist_irq_mask; u32 mdp_intf_irq_mask; Loading Loading @@ -406,8 +423,6 @@ struct mdss_data_type { u32 *vbif_rt_qos; u32 *vbif_nrt_qos; u32 npriority_lvl; u32 rot_dwnscale_min; u32 rot_dwnscale_max; struct mult_factor ab_factor; struct mult_factor ib_factor; Loading Loading @@ -483,6 +498,7 @@ struct mdss_data_type { int iommu_attached; u32 dbg_bus_flags; struct debug_bus *dbg_bus; u32 dbg_bus_size; struct vbif_debug_bus *vbif_dbg_bus; Loading Loading @@ -531,13 +547,15 @@ struct mdss_data_type { u32 bcolor2; struct mdss_scaler_block *scaler_off; u32 splash_intf_sel; u32 splash_split_disp; struct mult_factor bus_throughput_factor; u32 max_dest_scaler_input_width; u32 max_dest_scaler_output_width; struct mdss_mdp_destination_scaler *ds; u32 sec_disp_en; u32 sec_cam_en; u32 sec_session_cnt; wait_queue_head_t secure_waitq; struct cx_ipeak_client *mdss_cx_ipeak; struct mult_factor bus_throughput_factor; }; extern struct mdss_data_type *mdss_res; Loading Loading @@ -581,14 +599,15 @@ struct mdss_util_intf { int (*iommu_ctrl)(int enable); void (*iommu_lock)(void); void (*iommu_unlock)(void); void (*vbif_reg_lock)(void); void (*vbif_reg_unlock)(void); int (*secure_session_ctrl)(int enable); void (*bus_bandwidth_ctrl)(int enable); int (*bus_scale_set_quota)(int client, u64 ab_quota, u64 ib_quota); int (*panel_intf_status)(u32 disp_num, u32 intf_type); struct mdss_panel_cfg* (*panel_intf_type)(int intf_val); int (*dyn_clk_gating_ctrl)(int enable); bool (*param_check)(char *param_string); bool display_disabled; bool (*mdp_handoff_pending)(void); }; struct mdss_util_intf *mdss_get_util_intf(void); Loading
drivers/video/fbdev/msm/mdss_cec_core.c +2 −2 Original line number Diff line number Diff line /* Copyright (c) 2015-2016, 2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2018, 2020, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -700,7 +700,7 @@ static ssize_t cec_wta_msg(struct device *dev, } spin_unlock_irqrestore(&ctl->lock, flags); if (msg->frame_size > MAX_OPERAND_SIZE) { if (msg->frame_size > MAX_CEC_FRAME_SIZE) { pr_err("msg frame too big!\n"); ret = -EINVAL; goto end; Loading