Loading arch/arm64/boot/dts/qcom/sdmmagpie-coresight.dtsi 0 → 100644 +2589 −0 File added.Preview size limit exceeded, changes collapsed. Show changes arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -1054,6 +1054,15 @@ #thermal-sensor-cells = <1>; }; dcc: dcc_v2@10a2000 { compatible = "qcom,dcc-v2"; reg = <0x10a2000 0x1000>, <0x10ae000 0x2000>; reg-names = "dcc-base", "dcc-ram-base"; dcc-ram-offset = <0x6000>; }; qcom,llcc@9200000 { compatible = "qcom,llcc-core", "syscon", "simple-mfd"; reg = <0x9200000 0x450000>; Loading Loading @@ -1829,3 +1838,4 @@ #include "pm6150.dtsi" #include "pm6150l.dtsi" #include "sdmmagpie-regulator.dtsi" #include "sdmmagpie-coresight.dtsi" Loading
arch/arm64/boot/dts/qcom/sdmmagpie-coresight.dtsi 0 → 100644 +2589 −0 File added.Preview size limit exceeded, changes collapsed. Show changes
arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +10 −0 Original line number Diff line number Diff line Loading @@ -1054,6 +1054,15 @@ #thermal-sensor-cells = <1>; }; dcc: dcc_v2@10a2000 { compatible = "qcom,dcc-v2"; reg = <0x10a2000 0x1000>, <0x10ae000 0x2000>; reg-names = "dcc-base", "dcc-ram-base"; dcc-ram-offset = <0x6000>; }; qcom,llcc@9200000 { compatible = "qcom,llcc-core", "syscon", "simple-mfd"; reg = <0x9200000 0x450000>; Loading Loading @@ -1829,3 +1838,4 @@ #include "pm6150.dtsi" #include "pm6150l.dtsi" #include "sdmmagpie-regulator.dtsi" #include "sdmmagpie-coresight.dtsi"