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Commit 4913a8bd authored by Aditya Bavanari's avatar Aditya Bavanari Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Update gpio configuration of swr gpios for atoll target 



Update LPI GPIO configuration for all swr gpios
as per hardware requirements. Enable BTFM feature
for atoll target.

Change-Id: I85d825640de901fbee3718d351547bc529314029
Signed-off-by: default avatarAditya Bavanari <abavanar@codeaurora.org>
parent d08071ee

arch/arm64/boot/dts/qcom/atoll-audio-overlay.dtsi

+31 −17
Original line number Diff line number Diff line
@@ -26,11 +26,12 @@ 
	qcom,va_mclk_mode_muxsel = <0x627A0000>;



	clock-names = "tx_core_clk", "tx_npl_clk", "rx_core_clk", "rx_npl_clk",

			"wsa_core_clk", "wsa_npl_clk", "va_core_clk";

			"wsa_core_clk", "wsa_npl_clk", "va_core_clk",

			"va_npl_clk";

	clocks = <&clock_audio_tx_1 0>, <&clock_audio_tx_2 0>,

		<&clock_audio_rx_1 0>, <&clock_audio_rx_2 0>,

		<&clock_audio_wsa_1 0>, <&clock_audio_wsa_2 0>,

		<&clock_audio_va 0>;

		<&clock_audio_va_1 0>, <&clock_audio_va_2 0>;

	};



	tx_macro: tx-macro@62620000 {
@@ -230,8 +231,8 @@ 


		qcom,cdc-static-supplies = "cdc-vdd-rxtx",

					   "cdc-vddio",

					   "cdc-vdd-buck",

					   "cdc-vdd-mic-bias";

		qcom,cdc-on-demand-supplies = "cdc-vdd-buck";

	};



	wcd937x_codec: wcd937x-codec {
@@ -283,7 +284,7 @@ 


&atoll_snd {

	qcom,model = "atoll-idp-snd-card";

	qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>;

	qcom,msm-mi2s-master = <1>, <1>, <1>, <1>, <1>, <1>;

	qcom,ext-disp-audio-rx = <0>;

	qcom,audio-routing =

		"AMIC1", "MIC BIAS1",
@@ -378,11 +379,11 @@ 
				  "SpkrLeft", "SpkrRight";

	qcom,codec-max-aux-devs = <1>;

	qcom,codec-aux-devs = <&wcd938x_codec>;

	qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>,

				<&lpi_tlmm>, <&bolero>;

	qcom,msm_audio_ssr_devs = <&audio_apr>, <&q6core>, <&bolero>,

				  <&lpi_tlmm>;

};



&soc {

&q6core {

	cdc_dmic01_gpios: cdc_dmic01_pinctrl {

		compatible = "qcom,msm-cdc-pinctrl";

		pinctrl-names = "aud_active", "aud_sleep";
@@ -426,13 +427,15 @@ 
	tx_swr_gpios: tx_swr_clk_data_pinctrl {

		compatible = "qcom,msm-cdc-pinctrl";

		pinctrl-names = "aud_active", "aud_sleep";

		pinctrl-0 = <&tx_swr_clk_active

		pinctrl-0 = <&tx_swr_clk_active &tx_swr_data0_active

			     &tx_swr_data1_active &tx_swr_data2_active>;

		pinctrl-1 = <&tx_swr_clk_sleep

		pinctrl-1 = <&tx_swr_clk_sleep &tx_swr_data0_sleep

			    &tx_swr_data1_sleep &tx_swr_data2_sleep>;

		qcom,lpi-gpios;

	};

};



&soc {

	wsa_spkr_en1: wsa_spkr_en1_pinctrl {

		compatible = "qcom,msm-cdc-pinctrl";

		pinctrl-names = "aud_active", "aud_sleep";
@@ -470,14 +473,6 @@ 
		#clock-cells = <1>;

	};



	clock_audio_va: va_core_clk  {

		compatible = "qcom,audio-ref-clk";

		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_1>;

		qcom,codec-lpass-ext-clk-freq = <19200000>;

		qcom,codec-lpass-clk-id = <0x30B>;

		#clock-cells = <1>;

	};



	clock_audio_rx_1: rx_core_clk {

		compatible = "qcom,audio-ref-clk";

		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_4>;
@@ -510,4 +505,23 @@ 
		#clock-cells = <1>;

	};



	clock_audio_va_1: va_core_clk {

		compatible = "qcom,audio-ref-clk";

		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK>;

		qcom,codec-lpass-ext-clk-freq = <19200000>;

		qcom,codec-lpass-clk-id = <0x30B>;

		#clock-cells = <1>;

	};



	clock_audio_va_2: va_npl_clk {

		compatible = "qcom,audio-ref-clk";

		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_8>;

		qcom,codec-lpass-ext-clk-freq = <19200000>;

		qcom,codec-lpass-clk-id = <0x310>;

		#clock-cells = <1>;

	};

};



&va_cdc_dma_0_tx {

	qcom,msm-dai-is-island-supported = <1>;

};

arch/arm64/boot/dts/qcom/atoll-audio.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -79,7 +79,7 @@ 
		compatible = "qcom,kona-asoc-snd";

		qcom,mi2s-audio-intf = <1>;

		qcom,auxpcm-audio-intf = <1>;

		qcom,wcn-btfm = <0>;

		qcom,wcn-btfm = <1>;

		qcom,ext-disp-audio-rx = <0>;

		qcom,afe-rxtx-lb = <0>;

arch/arm64/boot/dts/qcom/atoll-lpi.dtsi

+22 −15
Original line number Diff line number Diff line
@@ -11,7 +11,7 @@ 
 * GNU General Public License for more details.

 */



&soc {

&q6core {

	lpi_tlmm: lpi_pinctrl@627C0000 {

		compatible = "qcom,lpi-pinctrl";

		reg = <0x627C0000 0x0>;
@@ -223,8 +223,9 @@ 


			config {

				pins = "gpio0";

				drive-strength = <8>;

				bias-bus-hold;

				drive-strength = <2>;

				slew-rate = <1>;

				bias-disable;

			};

		};
@@ -249,7 +250,8 @@ 


			config {

				pins = "gpio1";

				drive-strength = <8>;

				drive-strength = <2>;

				slew-rate = <1>;

				bias-bus-hold;

			};

		};
@@ -257,7 +259,7 @@ 
		wsa_swr_clk_sleep: wsa_swr_clk_sleep {

			mux {

				pins = "gpio10";

				function = "func1";

				function = "func2";

			};



			config {
@@ -270,12 +272,13 @@ 
		wsa_swr_clk_active: wsa_swr_clk_active {

			mux {

				pins = "gpio10";

				function = "func1";

				function = "func2";

			};



			config {

				pins = "gpio10";

				drive-strength = <8>;

				drive-strength = <2>;

				slew-rate = <1>;

				bias-bus-hold;

			};

		};
@@ -283,7 +286,7 @@ 
		wsa_swr_data_sleep: wsa_swr_data_sleep {

			mux {

				pins = "gpio11";

				function = "func1";

				function = "func2";

			};



			config {
@@ -296,12 +299,12 @@ 
		wsa_swr_data_active: wsa_swr_data_active {

			mux {

				pins = "gpio11";

				function = "func1";

				function = "func2";

			};



			config {

				pins = "gpio11";

				drive-strength = <8>;

				drive-strength = <2>;

				bias-bus-hold;

			};

		};
@@ -327,7 +330,8 @@ 


			config {

				pins = "gpio2";

				drive-strength = <8>;

				drive-strength = <2>;

				slew-rate = <1>;

				bias-bus-hold;

			};

		};
@@ -353,7 +357,8 @@ 


			config {

				pins = "gpio14";

				drive-strength = <8>;

				drive-strength = <2>;

				slew-rate = <1>;

				bias-bus-hold;

			};

		};
@@ -379,8 +384,9 @@ 


			config {

				pins = "gpio3";

				drive-strength = <8>;

				bias-bus-hold;

				drive-strength = <2>;

				slew-rate = <1>;

				bias-disable;

			};

		};
@@ -405,7 +411,8 @@ 


			config {

				pins = "gpio4", "gpio5";

				drive-strength = <8>;

				drive-strength = <2>;

				slew-rate = <1>;

				bias-bus-hold;

			};

		};

arch/arm64/boot/dts/qcom/atoll.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -40,6 +40,9 @@ 
		sdhc1 = &sdhc_1; /* eMMC */

		sdhc2 = &sdhc_2; /* SD Card */

		ufshc1 = &ufshc_mem; /* Embedded UFS slot */

		swr0 = &swr0;

		swr1 = &swr1;

		swr2 = &swr2;

	};



	cpus {

include/dt-bindings/clock/qcom,audio-ext-clk-v2.h

+1 −1
Original line number Diff line number Diff line
@@ -16,7 +16,7 @@ 
/* Audio External Clocks */

#define AUDIO_PMI_CLK		0

#define AUDIO_PMIC_LNBB_CLK	1

#define AUDIO_LPASS_MCLK_1	2

#define AUDIO_LPASS_MCLK	2

#define AUDIO_LPASS_MCLK_2	3

#define AUDIO_LPASS_MCLK_3	4

#define AUDIO_LPASS_MCLK_4	5