Loading drivers/firmware/qcom/tz_log.c +33 −12 Original line number Diff line number Diff line Loading @@ -864,6 +864,11 @@ const struct file_operations tzdbg_fops = { */ static void tzdbg_register_qsee_log_buf(struct platform_device *pdev) { /* register log buffer scm request */ struct qseecom_reg_log_buf_ireq req = {}; /* scm response */ struct qseecom_command_scm_resp resp = {}; size_t len; int ret = 0; struct scm_desc desc = {0}; Loading @@ -878,21 +883,30 @@ static void tzdbg_register_qsee_log_buf(struct platform_device *pdev) g_qsee_log = (struct tzdbg_log_t *)buf; if (!is_scm_armv8()) { req.qsee_cmd_id = QSEOS_REGISTER_LOG_BUF_COMMAND; req.phy_addr = (uint32_t)coh_pmem; req.len = len; /* SCM_CALL to register the log buffer */ ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &req, sizeof(req), &resp, sizeof(resp)); } else { desc.args[0] = coh_pmem; desc.args[1] = len; desc.arginfo = 0x22; ret = scm_call2(SCM_QSEEOS_FNID(1, 6), &desc); resp.result = desc.ret[0]; } if (ret) { pr_err("%s: scm_call to register log buffer failed\n", __func__); goto err; } if (desc.ret[0] != QSEOS_RESULT_SUCCESS) { if (resp.result != QSEOS_RESULT_SUCCESS) { pr_err( "%s: scm_call to register log buf failed, resp result =%llu\n", __func__, desc.ret[0]); __func__, resp.result); goto err; } Loading Loading @@ -999,19 +1013,26 @@ static void tzdbg_get_tz_version(void) { uint32_t smc_id = 0; uint32_t feature = 10; struct qseecom_command_scm_resp resp = {0}; struct scm_desc desc = {0}; int ret = 0; if (!is_scm_armv8()) { ret = scm_call(SCM_SVC_INFO, SCM_SVC_UTIL, &feature, sizeof(feature), &resp, sizeof(resp)); } else { smc_id = TZ_INFO_GET_FEATURE_VERSION_ID; desc.arginfo = TZ_INFO_GET_FEATURE_VERSION_ID_PARAM_ID; desc.args[0] = feature; ret = scm_call2(smc_id, &desc); resp.result = desc.ret[0]; } if (ret) pr_err("%s: scm_call to get tz version failed\n", __func__); else tzdbg.tz_version = desc.ret[0]; tzdbg.tz_version = resp.result; } Loading drivers/power/reset/msm-poweroff.c +13 −2 Original line number Diff line number Diff line Loading @@ -128,6 +128,9 @@ int scm_set_dload_mode(int arg1, int arg2) return 0; } if (!is_scm_armv8()) return scm_call_atomic2(SCM_SVC_BOOT, SCM_DLOAD_CMD, arg1, arg2); return scm_call2_atomic(SCM_SIP_FNID(SCM_SVC_BOOT, SCM_DLOAD_CMD), &desc); Loading Loading @@ -240,6 +243,10 @@ static void scm_disable_sdi(void) }; /* Needed to bypass debug image on some chips */ if (!is_scm_armv8()) ret = scm_call_atomic2(SCM_SVC_BOOT, SCM_WDOG_DEBUG_BOOT_PART, 1, 0); else ret = scm_call2_atomic(SCM_SIP_FNID(SCM_SVC_BOOT, SCM_WDOG_DEBUG_BOOT_PART), &desc); if (ret) Loading Loading @@ -267,6 +274,10 @@ static void halt_spmi_pmic_arbiter(void) if (scm_pmic_arbiter_disable_supported) { pr_crit("Calling SCM to disable SPMI PMIC arbiter\n"); if (!is_scm_armv8()) scm_call_atomic1(SCM_SVC_PWR, SCM_IO_DISABLE_PMIC_ARBITER, 0); else scm_call2_atomic(SCM_SIP_FNID(SCM_SVC_PWR, SCM_IO_DISABLE_PMIC_ARBITER), &desc); } Loading drivers/regulator/cpr-regulator.c +27 −7 Original line number Diff line number Diff line /* * Copyright (c) 2013-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2013-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -442,6 +442,16 @@ static u64 cpr_read_efuse_row(struct cpr_regulator *cpr_vreg, u32 row_num, u64 efuse_bits; struct scm_desc desc = {0}; struct cpr_read_req { u32 row_address; int addr_type; } req; struct cpr_read_rsp { u32 row_data[2]; u32 status; } rsp; if (cpr_vreg->remapped_row && row_num >= cpr_vreg->remapped_row_base) return cpr_read_remapped_efuse_row(cpr_vreg, row_num); Loading @@ -450,20 +460,30 @@ static u64 cpr_read_efuse_row(struct cpr_regulator *cpr_vreg, u32 row_num, + row_num * BYTES_PER_FUSE_ROW); return efuse_bits; } desc.args[0] = cpr_vreg->efuse_addr + row_num * BYTES_PER_FUSE_ROW; desc.args[1] = 0; desc.args[0] = req.row_address = cpr_vreg->efuse_addr + row_num * BYTES_PER_FUSE_ROW; desc.args[1] = req.addr_type = 0; desc.arginfo = SCM_ARGS(2); efuse_bits = 0; rc = scm_call2(SCM_SIP_FNID(SCM_SVC_FUSE, SCM_FUSE_READ), &desc); if (!is_scm_armv8()) { rc = scm_call(SCM_SVC_FUSE, SCM_FUSE_READ, &req, sizeof(req), &rsp, sizeof(rsp)); } else { rc = scm_call2(SCM_SIP_FNID(SCM_SVC_FUSE, SCM_FUSE_READ), &desc); rsp.row_data[0] = desc.ret[0]; rsp.row_data[1] = desc.ret[1]; rsp.status = desc.ret[2]; } if (rc) { cpr_err(cpr_vreg, "read row %d failed, err code = %d", row_num, rc); } else { efuse_bits = ((u64)(desc.ret[1]) << 32) + (u64)desc.ret[0]; efuse_bits = ((u64)(rsp.row_data[1]) << 32) + (u64)rsp.row_data[0]; } return efuse_bits; } Loading drivers/regulator/mem-acc-regulator.c +27 −5 Original line number Diff line number Diff line /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -121,22 +121,44 @@ static u64 mem_acc_read_efuse_row(struct mem_acc_regulator *mem_acc_vreg, u64 efuse_bits; struct scm_desc desc = {0}; struct mem_acc_read_req { u32 row_address; int addr_type; } req; struct mem_acc_read_rsp { u32 row_data[2]; u32 status; } rsp; if (!use_tz_api) { efuse_bits = readq_relaxed(mem_acc_vreg->efuse_base + row_num * BYTES_PER_FUSE_ROW); return efuse_bits; } desc.args[0] = mem_acc_vreg->efuse_addr + row_num * BYTES_PER_FUSE_ROW; desc.args[1] = 0; desc.args[0] = req.row_address = mem_acc_vreg->efuse_addr + row_num * BYTES_PER_FUSE_ROW; desc.args[1] = req.addr_type = 0; desc.arginfo = SCM_ARGS(2); efuse_bits = 0; rc = scm_call2(SCM_SIP_FNID(SCM_SVC_FUSE, SCM_FUSE_READ), &desc); if (!is_scm_armv8()) { rc = scm_call(SCM_SVC_FUSE, SCM_FUSE_READ, &req, sizeof(req), &rsp, sizeof(rsp)); } else { rc = scm_call2(SCM_SIP_FNID(SCM_SVC_FUSE, SCM_FUSE_READ), &desc); rsp.row_data[0] = desc.ret[0]; rsp.row_data[1] = desc.ret[1]; rsp.status = desc.ret[2]; } if (rc) { pr_err("read row %d failed, err code = %d", row_num, rc); } else { efuse_bits = ((u64)(desc.ret[1]) << 32) + (u64)desc.ret[0]; efuse_bits = ((u64)(rsp.row_data[1]) << 32) + (u64)rsp.row_data[0]; } return efuse_bits; Loading drivers/soc/qcom/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -28,7 +28,7 @@ obj-$(CONFIG_QCOM_SMP2P) += smp2p.o obj-$(CONFIG_QCOM_SMSM) += smsm.o obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) obj-$(CONFIG_QCOM_SCM) += scm.o obj-$(CONFIG_QCOM_SCM) += scm.o scm-boot.o obj-$(CONFIG_QCOM_SCM_QCPE) += scm_qcpe.o obj-$(CONFIG_QCOM_EARLY_RANDOM) += early_random.o obj-$(CONFIG_SOC_BUS) += socinfo.o Loading Loading
drivers/firmware/qcom/tz_log.c +33 −12 Original line number Diff line number Diff line Loading @@ -864,6 +864,11 @@ const struct file_operations tzdbg_fops = { */ static void tzdbg_register_qsee_log_buf(struct platform_device *pdev) { /* register log buffer scm request */ struct qseecom_reg_log_buf_ireq req = {}; /* scm response */ struct qseecom_command_scm_resp resp = {}; size_t len; int ret = 0; struct scm_desc desc = {0}; Loading @@ -878,21 +883,30 @@ static void tzdbg_register_qsee_log_buf(struct platform_device *pdev) g_qsee_log = (struct tzdbg_log_t *)buf; if (!is_scm_armv8()) { req.qsee_cmd_id = QSEOS_REGISTER_LOG_BUF_COMMAND; req.phy_addr = (uint32_t)coh_pmem; req.len = len; /* SCM_CALL to register the log buffer */ ret = scm_call(SCM_SVC_TZSCHEDULER, 1, &req, sizeof(req), &resp, sizeof(resp)); } else { desc.args[0] = coh_pmem; desc.args[1] = len; desc.arginfo = 0x22; ret = scm_call2(SCM_QSEEOS_FNID(1, 6), &desc); resp.result = desc.ret[0]; } if (ret) { pr_err("%s: scm_call to register log buffer failed\n", __func__); goto err; } if (desc.ret[0] != QSEOS_RESULT_SUCCESS) { if (resp.result != QSEOS_RESULT_SUCCESS) { pr_err( "%s: scm_call to register log buf failed, resp result =%llu\n", __func__, desc.ret[0]); __func__, resp.result); goto err; } Loading Loading @@ -999,19 +1013,26 @@ static void tzdbg_get_tz_version(void) { uint32_t smc_id = 0; uint32_t feature = 10; struct qseecom_command_scm_resp resp = {0}; struct scm_desc desc = {0}; int ret = 0; if (!is_scm_armv8()) { ret = scm_call(SCM_SVC_INFO, SCM_SVC_UTIL, &feature, sizeof(feature), &resp, sizeof(resp)); } else { smc_id = TZ_INFO_GET_FEATURE_VERSION_ID; desc.arginfo = TZ_INFO_GET_FEATURE_VERSION_ID_PARAM_ID; desc.args[0] = feature; ret = scm_call2(smc_id, &desc); resp.result = desc.ret[0]; } if (ret) pr_err("%s: scm_call to get tz version failed\n", __func__); else tzdbg.tz_version = desc.ret[0]; tzdbg.tz_version = resp.result; } Loading
drivers/power/reset/msm-poweroff.c +13 −2 Original line number Diff line number Diff line Loading @@ -128,6 +128,9 @@ int scm_set_dload_mode(int arg1, int arg2) return 0; } if (!is_scm_armv8()) return scm_call_atomic2(SCM_SVC_BOOT, SCM_DLOAD_CMD, arg1, arg2); return scm_call2_atomic(SCM_SIP_FNID(SCM_SVC_BOOT, SCM_DLOAD_CMD), &desc); Loading Loading @@ -240,6 +243,10 @@ static void scm_disable_sdi(void) }; /* Needed to bypass debug image on some chips */ if (!is_scm_armv8()) ret = scm_call_atomic2(SCM_SVC_BOOT, SCM_WDOG_DEBUG_BOOT_PART, 1, 0); else ret = scm_call2_atomic(SCM_SIP_FNID(SCM_SVC_BOOT, SCM_WDOG_DEBUG_BOOT_PART), &desc); if (ret) Loading Loading @@ -267,6 +274,10 @@ static void halt_spmi_pmic_arbiter(void) if (scm_pmic_arbiter_disable_supported) { pr_crit("Calling SCM to disable SPMI PMIC arbiter\n"); if (!is_scm_armv8()) scm_call_atomic1(SCM_SVC_PWR, SCM_IO_DISABLE_PMIC_ARBITER, 0); else scm_call2_atomic(SCM_SIP_FNID(SCM_SVC_PWR, SCM_IO_DISABLE_PMIC_ARBITER), &desc); } Loading
drivers/regulator/cpr-regulator.c +27 −7 Original line number Diff line number Diff line /* * Copyright (c) 2013-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2013-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -442,6 +442,16 @@ static u64 cpr_read_efuse_row(struct cpr_regulator *cpr_vreg, u32 row_num, u64 efuse_bits; struct scm_desc desc = {0}; struct cpr_read_req { u32 row_address; int addr_type; } req; struct cpr_read_rsp { u32 row_data[2]; u32 status; } rsp; if (cpr_vreg->remapped_row && row_num >= cpr_vreg->remapped_row_base) return cpr_read_remapped_efuse_row(cpr_vreg, row_num); Loading @@ -450,20 +460,30 @@ static u64 cpr_read_efuse_row(struct cpr_regulator *cpr_vreg, u32 row_num, + row_num * BYTES_PER_FUSE_ROW); return efuse_bits; } desc.args[0] = cpr_vreg->efuse_addr + row_num * BYTES_PER_FUSE_ROW; desc.args[1] = 0; desc.args[0] = req.row_address = cpr_vreg->efuse_addr + row_num * BYTES_PER_FUSE_ROW; desc.args[1] = req.addr_type = 0; desc.arginfo = SCM_ARGS(2); efuse_bits = 0; rc = scm_call2(SCM_SIP_FNID(SCM_SVC_FUSE, SCM_FUSE_READ), &desc); if (!is_scm_armv8()) { rc = scm_call(SCM_SVC_FUSE, SCM_FUSE_READ, &req, sizeof(req), &rsp, sizeof(rsp)); } else { rc = scm_call2(SCM_SIP_FNID(SCM_SVC_FUSE, SCM_FUSE_READ), &desc); rsp.row_data[0] = desc.ret[0]; rsp.row_data[1] = desc.ret[1]; rsp.status = desc.ret[2]; } if (rc) { cpr_err(cpr_vreg, "read row %d failed, err code = %d", row_num, rc); } else { efuse_bits = ((u64)(desc.ret[1]) << 32) + (u64)desc.ret[0]; efuse_bits = ((u64)(rsp.row_data[1]) << 32) + (u64)rsp.row_data[0]; } return efuse_bits; } Loading
drivers/regulator/mem-acc-regulator.c +27 −5 Original line number Diff line number Diff line /* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved. /* Copyright (c) 2014-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -121,22 +121,44 @@ static u64 mem_acc_read_efuse_row(struct mem_acc_regulator *mem_acc_vreg, u64 efuse_bits; struct scm_desc desc = {0}; struct mem_acc_read_req { u32 row_address; int addr_type; } req; struct mem_acc_read_rsp { u32 row_data[2]; u32 status; } rsp; if (!use_tz_api) { efuse_bits = readq_relaxed(mem_acc_vreg->efuse_base + row_num * BYTES_PER_FUSE_ROW); return efuse_bits; } desc.args[0] = mem_acc_vreg->efuse_addr + row_num * BYTES_PER_FUSE_ROW; desc.args[1] = 0; desc.args[0] = req.row_address = mem_acc_vreg->efuse_addr + row_num * BYTES_PER_FUSE_ROW; desc.args[1] = req.addr_type = 0; desc.arginfo = SCM_ARGS(2); efuse_bits = 0; rc = scm_call2(SCM_SIP_FNID(SCM_SVC_FUSE, SCM_FUSE_READ), &desc); if (!is_scm_armv8()) { rc = scm_call(SCM_SVC_FUSE, SCM_FUSE_READ, &req, sizeof(req), &rsp, sizeof(rsp)); } else { rc = scm_call2(SCM_SIP_FNID(SCM_SVC_FUSE, SCM_FUSE_READ), &desc); rsp.row_data[0] = desc.ret[0]; rsp.row_data[1] = desc.ret[1]; rsp.status = desc.ret[2]; } if (rc) { pr_err("read row %d failed, err code = %d", row_num, rc); } else { efuse_bits = ((u64)(desc.ret[1]) << 32) + (u64)desc.ret[0]; efuse_bits = ((u64)(rsp.row_data[1]) << 32) + (u64)rsp.row_data[0]; } return efuse_bits; Loading
drivers/soc/qcom/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -28,7 +28,7 @@ obj-$(CONFIG_QCOM_SMP2P) += smp2p.o obj-$(CONFIG_QCOM_SMSM) += smsm.o obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) obj-$(CONFIG_QCOM_SCM) += scm.o obj-$(CONFIG_QCOM_SCM) += scm.o scm-boot.o obj-$(CONFIG_QCOM_SCM_QCPE) += scm_qcpe.o obj-$(CONFIG_QCOM_EARLY_RANDOM) += early_random.o obj-$(CONFIG_SOC_BUS) += socinfo.o Loading