Loading arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +125 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ #include <dt-bindings/regulator/qcom,rpmh-regulator.h> #include <dt-bindings/soc/qcom,tcs-mbox.h> #include <dt-bindings/clock/qcom,cpucc-sm8150.h> #include <dt-bindings/msm/msm-bus-ids.h> #define MHZ_TO_MBPS(mhz, w) ((mhz * 1000000 * w) / (1024 * 1024)) #define BW_OPP_ENTRY(mhz, w) opp-mhz {opp-hz = /bits/ 64 <MHZ_TO_MBPS(mhz, w)>;} Loading Loading @@ -1827,6 +1828,18 @@ interrupt-controller; #interrupt-cells = <2>; }; smp2p_ipa_1_out: qcom,smp2p-ipa-1-out { qcom,entry-name = "ipa"; #qcom,smem-state-cells = <1>; }; /* ipa - inbound entry from mss */ smp2p_ipa_1_in: qcom,smp2p-ipa-1-in { qcom,entry-name = "ipa"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-adsp { Loading Loading @@ -2353,6 +2366,118 @@ qcom,wlan-msa-fixed-region = <&wlan_msa_mem>; }; qcom,msm_gsi { compatible = "qcom,msm_gsi"; }; qcom,rmnet-ipa { compatible = "qcom,rmnet-ipa3"; qcom,rmnet-ipa-ssr; qcom,ipa-platform-type-msm; qcom,ipa-advertise-sg-support; qcom,ipa-napi-enable; }; ipa_hw: qcom,ipa@1e00000 { compatible = "qcom,ipa"; reg = <0x1e00000 0x34000>, <0x1e04000 0x2c000>; reg-names = "ipa-base", "gsi-base"; interrupts = <0 311 0>, <0 432 0>; interrupt-names = "ipa-irq", "gsi-irq"; qcom,ipa-hw-ver = <16>; /* IPA core version = IPAv4.2 */ qcom,ipa-hw-mode = <0>; qcom,ee = <0>; qcom,use-ipa-tethering-bridge; qcom,modem-cfg-emb-pipe-flt; qcom,ipa-wdi2; qcom,ipa-wdi2_over_gsi; qcom,ipa-fltrt-not-hashable; qcom,use-64-bit-dma-mask; qcom,arm-smmu; qcom,smmu-fast-map; qcom,use-ipa-pm; qcom,bandwidth-vote-for-ipa; qcom,msm-bus,name = "ipa"; qcom,msm-bus,num-cases = <5>; qcom,msm-bus,num-paths = <4>; qcom,msm-bus,vectors-KBps = /* No vote */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 0 0>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 0 0>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 0>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 0>, /* SVS2 */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 465000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 68570>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 80000 30>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 30>, /* SVS */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 2000000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 267461>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 80000 109890>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 109>, /* NOMINAL */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 4000000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 712961>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 491520>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 491>, /* TURBO */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 5598900>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 1436481>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 491520>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 491>; qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL", "TURBO"; qcom,throughput-threshold = <310 600 1000>; qcom,scaling-exceptions = <>; /* smp2p information */ qcom,smp2p_map_ipa_1_out { compatible = "qcom,smp2p-map-ipa-1-out"; qcom,smem-states = <&smp2p_ipa_1_out 0>; qcom,smem-state-names = "ipa-smp2p-out"; }; qcom,smp2p_map_ipa_1_in { compatible = "qcom,smp2p-map-ipa-1-in"; interrupts-extended = <&smp2p_ipa_1_in 0 0>; interrupt-names = "ipa-smp2p-in"; }; }; ipa_smmu_ap: ipa_smmu_ap { compatible = "qcom,ipa-smmu-ap-cb"; qcom,smmu-s1-bypass; iommus = <&apps_smmu 0x520 0x0>; qcom,iova-mapping = <0x20000000 0x40000000>; /* modem tables in IMEM */ qcom,additional-mapping = <0x146bd000 0x146bd000 0x2000>; }; ipa_smmu_wlan: ipa_smmu_wlan { compatible = "qcom,ipa-smmu-wlan-cb"; qcom,smmu-s1-bypass; iommus = <&apps_smmu 0x521 0x0>; /* ipa-uc ram */ qcom,additional-mapping = <0x1e60000 0x1e60000 0x80000>; }; ipa_smmu_uc: ipa_smmu_uc { compatible = "qcom,ipa-smmu-uc-cb"; qcom,smmu-s1-bypass; iommus = <&apps_smmu 0x522 0x0>; qcom,iova-mapping = <0x40400000 0x1fc00000>; }; qcom,ipa_fws { compatible = "qcom,pil-tz-generic"; qcom,pas-id = <0xf>; qcom,firmware-name = "ipa_fws"; qcom,pil-force-shutdown; memory-region = <&pil_ipa_fw_mem>; }; }; #include "sdmmagpie-pinctrl.dtsi" Loading Loading
arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +125 −0 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ #include <dt-bindings/regulator/qcom,rpmh-regulator.h> #include <dt-bindings/soc/qcom,tcs-mbox.h> #include <dt-bindings/clock/qcom,cpucc-sm8150.h> #include <dt-bindings/msm/msm-bus-ids.h> #define MHZ_TO_MBPS(mhz, w) ((mhz * 1000000 * w) / (1024 * 1024)) #define BW_OPP_ENTRY(mhz, w) opp-mhz {opp-hz = /bits/ 64 <MHZ_TO_MBPS(mhz, w)>;} Loading Loading @@ -1827,6 +1828,18 @@ interrupt-controller; #interrupt-cells = <2>; }; smp2p_ipa_1_out: qcom,smp2p-ipa-1-out { qcom,entry-name = "ipa"; #qcom,smem-state-cells = <1>; }; /* ipa - inbound entry from mss */ smp2p_ipa_1_in: qcom,smp2p-ipa-1-in { qcom,entry-name = "ipa"; interrupt-controller; #interrupt-cells = <2>; }; }; qcom,smp2p-adsp { Loading Loading @@ -2353,6 +2366,118 @@ qcom,wlan-msa-fixed-region = <&wlan_msa_mem>; }; qcom,msm_gsi { compatible = "qcom,msm_gsi"; }; qcom,rmnet-ipa { compatible = "qcom,rmnet-ipa3"; qcom,rmnet-ipa-ssr; qcom,ipa-platform-type-msm; qcom,ipa-advertise-sg-support; qcom,ipa-napi-enable; }; ipa_hw: qcom,ipa@1e00000 { compatible = "qcom,ipa"; reg = <0x1e00000 0x34000>, <0x1e04000 0x2c000>; reg-names = "ipa-base", "gsi-base"; interrupts = <0 311 0>, <0 432 0>; interrupt-names = "ipa-irq", "gsi-irq"; qcom,ipa-hw-ver = <16>; /* IPA core version = IPAv4.2 */ qcom,ipa-hw-mode = <0>; qcom,ee = <0>; qcom,use-ipa-tethering-bridge; qcom,modem-cfg-emb-pipe-flt; qcom,ipa-wdi2; qcom,ipa-wdi2_over_gsi; qcom,ipa-fltrt-not-hashable; qcom,use-64-bit-dma-mask; qcom,arm-smmu; qcom,smmu-fast-map; qcom,use-ipa-pm; qcom,bandwidth-vote-for-ipa; qcom,msm-bus,name = "ipa"; qcom,msm-bus,num-cases = <5>; qcom,msm-bus,num-paths = <4>; qcom,msm-bus,vectors-KBps = /* No vote */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 0 0>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 0 0>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 0 0>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 0>, /* SVS2 */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 465000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 68570>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 80000 30>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 30>, /* SVS */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 80000 2000000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 80000 267461>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 80000 109890>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 109>, /* NOMINAL */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 4000000>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 712961>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 491520>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 491>, /* TURBO */ <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_EBI_CH0 206000 5598900>, <MSM_BUS_MASTER_IPA MSM_BUS_SLAVE_OCIMEM 206000 1436481>, <MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_IPA_CFG 206000 491520>, <MSM_BUS_MASTER_IPA_CORE MSM_BUS_SLAVE_IPA_CORE 0 491>; qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL", "TURBO"; qcom,throughput-threshold = <310 600 1000>; qcom,scaling-exceptions = <>; /* smp2p information */ qcom,smp2p_map_ipa_1_out { compatible = "qcom,smp2p-map-ipa-1-out"; qcom,smem-states = <&smp2p_ipa_1_out 0>; qcom,smem-state-names = "ipa-smp2p-out"; }; qcom,smp2p_map_ipa_1_in { compatible = "qcom,smp2p-map-ipa-1-in"; interrupts-extended = <&smp2p_ipa_1_in 0 0>; interrupt-names = "ipa-smp2p-in"; }; }; ipa_smmu_ap: ipa_smmu_ap { compatible = "qcom,ipa-smmu-ap-cb"; qcom,smmu-s1-bypass; iommus = <&apps_smmu 0x520 0x0>; qcom,iova-mapping = <0x20000000 0x40000000>; /* modem tables in IMEM */ qcom,additional-mapping = <0x146bd000 0x146bd000 0x2000>; }; ipa_smmu_wlan: ipa_smmu_wlan { compatible = "qcom,ipa-smmu-wlan-cb"; qcom,smmu-s1-bypass; iommus = <&apps_smmu 0x521 0x0>; /* ipa-uc ram */ qcom,additional-mapping = <0x1e60000 0x1e60000 0x80000>; }; ipa_smmu_uc: ipa_smmu_uc { compatible = "qcom,ipa-smmu-uc-cb"; qcom,smmu-s1-bypass; iommus = <&apps_smmu 0x522 0x0>; qcom,iova-mapping = <0x40400000 0x1fc00000>; }; qcom,ipa_fws { compatible = "qcom,pil-tz-generic"; qcom,pas-id = <0xf>; qcom,firmware-name = "ipa_fws"; qcom,pil-force-shutdown; memory-region = <&pil_ipa_fw_mem>; }; }; #include "sdmmagpie-pinctrl.dtsi" Loading