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Commit 46dc111d authored by Linus Torvalds's avatar Linus Torvalds
Browse files

rMerge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm 

Pull KVM fixes from Radim Krčmář:
 "ARM:
   - PSCI selection API, a leftover from 4.16 (for stable)
   - Kick vcpu on active interrupt affinity change
   - Plug a VMID allocation race on oversubscribed systems
   - Silence debug messages
   - Update Christoffer's email address (linaro -> arm)

  x86:
   - Expose userspace-relevant bits of a newly added feature
   - Fix TLB flushing on VMX with VPID, but without EPT"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
  x86/headers/UAPI: Move DISABLE_EXITS KVM capability bits to the UAPI
  kvm: apic: Flush TLB after APIC mode/address change if VPIDs are in use
  arm/arm64: KVM: Add PSCI version selection API
  KVM: arm/arm64: vgic: Kick new VCPU on interrupt migration
  arm64: KVM: Demote SVE and LORegion warnings to debug only
  MAINTAINERS: Update e-mail address for Christoffer Dall
  KVM: arm/arm64: Close VMID generation race
parents 19b522db 5e62493f

Documentation/virtual/kvm/api.txt

+8 −1
Original line number Diff line number Diff line
@@ -1960,6 +1960,9 @@ ARM 32-bit VFP control registers have the following id bit patterns: 
ARM 64-bit FP registers have the following id bit patterns:

  0x4030 0000 0012 0 <regno:12>



ARM firmware pseudo-registers have the following bit pattern:

  0x4030 0000 0014 <regno:16>





arm64 registers are mapped using the lower 32 bits. The upper 16 of

that is the register group type, or coprocessor number:
@@ -1976,6 +1979,9 @@ arm64 CCSIDR registers are demultiplexed by CSSELR value: 
arm64 system registers have the following id bit patterns:

  0x6030 0000 0013 <op0:2> <op1:3> <crn:4> <crm:4> <op2:3>



arm64 firmware pseudo-registers have the following bit pattern:

  0x6030 0000 0014 <regno:16>





MIPS registers are mapped using the lower 32 bits.  The upper 16 of that is

the register group type:
@@ -2510,7 +2516,8 @@ Possible features: 
	  and execute guest code when KVM_RUN is called.

	- KVM_ARM_VCPU_EL1_32BIT: Starts the CPU in a 32bit mode.

	  Depends on KVM_CAP_ARM_EL1_32BIT (arm64 only).

	- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 for the CPU.

	- KVM_ARM_VCPU_PSCI_0_2: Emulate PSCI v0.2 (or a future revision

          backward compatible with v0.2) for the CPU.

	  Depends on KVM_CAP_ARM_PSCI_0_2.

	- KVM_ARM_VCPU_PMU_V3: Emulate PMUv3 for the CPU.

	  Depends on KVM_CAP_ARM_PMU_V3.

Documentation/virtual/kvm/arm/psci.txt

0 → 100644
+30 −0
Original line number Diff line number Diff line 
KVM implements the PSCI (Power State Coordination Interface)

specification in order to provide services such as CPU on/off, reset

and power-off to the guest.



The PSCI specification is regularly updated to provide new features,

and KVM implements these updates if they make sense from a virtualization

point of view.



This means that a guest booted on two different versions of KVM can

observe two different "firmware" revisions. This could cause issues if

a given guest is tied to a particular PSCI revision (unlikely), or if

a migration causes a different PSCI version to be exposed out of the

blue to an unsuspecting guest.



In order to remedy this situation, KVM exposes a set of "firmware

pseudo-registers" that can be manipulated using the GET/SET_ONE_REG

interface. These registers can be saved/restored by userspace, and set

to a convenient value if required.



The following register is defined:



* KVM_REG_ARM_PSCI_VERSION:



  - Only valid if the vcpu has the KVM_ARM_VCPU_PSCI_0_2 feature set

    (and thus has already been initialized)

  - Returns the current PSCI version on GET_ONE_REG (defaulting to the

    highest PSCI version implemented by KVM and compatible with v0.2)

  - Allows any PSCI version implemented by KVM and compatible with

    v0.2 to be set with SET_ONE_REG

  - Affects the whole VM (even if the register view is per-vcpu)

MAINTAINERS

+2 −2
Original line number Diff line number Diff line
@@ -7744,7 +7744,7 @@ F: arch/x86/include/asm/svm.h 
F:	arch/x86/kvm/svm.c



KERNEL VIRTUAL MACHINE FOR ARM (KVM/arm)

M:	Christoffer Dall <christoffer.dall@linaro.org>

M:	Christoffer Dall <christoffer.dall@arm.com>

M:	Marc Zyngier <marc.zyngier@arm.com>

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

L:	kvmarm@lists.cs.columbia.edu
@@ -7758,7 +7758,7 @@ F: virt/kvm/arm/ 
F:	include/kvm/arm_*



KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64)

M:	Christoffer Dall <christoffer.dall@linaro.org>

M:	Christoffer Dall <christoffer.dall@arm.com>

M:	Marc Zyngier <marc.zyngier@arm.com>

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

L:	kvmarm@lists.cs.columbia.edu

arch/arm/include/asm/kvm_host.h

+3 −0
Original line number Diff line number Diff line
@@ -77,6 +77,9 @@ struct kvm_arch { 
	/* Interrupt controller */

	struct vgic_dist	vgic;

	int max_vcpus;



	/* Mandated version of PSCI */

	u32 psci_version;

};



#define KVM_NR_MEM_OBJS     40

arch/arm/include/uapi/asm/kvm.h

+6 −0
Original line number Diff line number Diff line
@@ -195,6 +195,12 @@ struct kvm_arch_memory_slot { 
#define KVM_REG_ARM_VFP_FPINST		0x1009

#define KVM_REG_ARM_VFP_FPINST2		0x100A



/* KVM-as-firmware specific pseudo-registers */

#define KVM_REG_ARM_FW			(0x0014 << KVM_REG_ARM_COPROC_SHIFT)

#define KVM_REG_ARM_FW_REG(r)		(KVM_REG_ARM | KVM_REG_SIZE_U64 | \

					 KVM_REG_ARM_FW | ((r) & 0xffff))

#define KVM_REG_ARM_PSCI_VERSION	KVM_REG_ARM_FW_REG(0)



/* Device Control API: ARM VGIC */

#define KVM_DEV_ARM_VGIC_GRP_ADDR	0

#define KVM_DEV_ARM_VGIC_GRP_DIST_REGS	1