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Commit 46bd71b2 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge changes I75d913f4,Iaf680027 into msm-4.14 

* changes:
  ARM: dts: msm: Remove references to BEAC from sdm855 LLCC PMU
  perf: Remove BEAC registers from LLCC PMU
parents 9a4b784a a14dc745

Documentation/devicetree/bindings/perf/qcom-llcc-pmu.txt

+6 −9
Original line number Diff line number Diff line
@@ -9,17 +9,14 @@ The follow section describes the LLCC PMU DT node binding. 


Required properties:

- compatible		: Shall be "qcom,qcom-llcc-pmu"

- reg			: There shall be two resources, each a pair of the form

			  < base_address total_size >.  One will represent the

			  DDR LAGG region, the other will represent the LLCC

			  BEAC region.

- reg-names		: There shall be two values, one 'lagg-base', one

			  'beac-base', corresponding to the order of the two

			  'reg' values.

- reg			: There shall be one resource, a pair of the form

			  < base_address total_size > representing the DDR_LAGG

			  region.

- reg-names		: Shall be "lagg-base".



Example:

	llcc_pmu: llcc-pmu {

		compatible = "qcom,qcom-llcc-pmu";

		reg = < 0x090CC000 0x300 >, < 0x09648000 0x110 >;

		reg-names = "lagg-base", "beac-base";

		reg = < 0x090CC000 0x300 >;

		reg-names = "lagg-base";

	};

arch/arm64/boot/dts/qcom/sdm855.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -901,8 +901,8 @@ 


	llcc_pmu: llcc-pmu@90cc000 {

		compatible = "qcom,qcom-llcc-pmu";

		reg = <0x090cc000 0x300>, <0x09648000 0x200>;

		reg-names = "lagg-base", "beac-base";

		reg = <0x090cc000 0x300>;

		reg-names = "lagg-base";

	};



	cpu_cpu_llcc_bw: qcom,cpu-cpu-llcc-bw {

drivers/perf/qcom_llcc_pmu.c

+3 −20
Original line number Diff line number Diff line
@@ -26,21 +26,18 @@ struct llcc_pmu { 
	struct pmu pmu;

	struct hlist_node node;

	void __iomem *lagg_base;

	void __iomem *beac_base;

	struct perf_event event;

};



#define MON_CFG(m) ((m)->lagg_base + 0x200)

#define MON_CNT(m, cpu) ((m)->lagg_base + 0x220 + 0x4 * cpu)

#define BEAC_ENABLE(m) ((m)->beac_base + 0x100)

#define BEAC_SCALE(m) ((m)->beac_base + 0x110)

#define to_llcc_pmu(ptr) (container_of(ptr, struct llcc_pmu, pmu))



#define LLCC_RD_EV 0x1000

#define ENABLE 0x01

#define CLEAR 0x10

#define DISABLE 0x00

#define SCALING_FACTOR 0x4

#define SCALING_FACTOR 0x3

#define NUM_COUNTERS NR_CPUS

#define VALUE_MASK 0xFFFFFF
@@ -108,10 +105,8 @@ static int qcom_llcc_event_add(struct perf_event *event, int flags) 
	struct llcc_pmu *llccpmu = to_llcc_pmu(event->pmu);



	raw_spin_lock(&users_lock);

	if (!users) {

	if (!users)

		writel_relaxed(ENABLE, MON_CFG(llccpmu));

		writel_relaxed(ENABLE, BEAC_ENABLE(llccpmu));

	}

	users++;

	raw_spin_unlock(&users_lock);
@@ -129,10 +124,8 @@ static void qcom_llcc_event_del(struct perf_event *event, int flags) 


	raw_spin_lock(&users_lock);

	users--;

	if (!users) {

	if (!users)

		writel_relaxed(DISABLE, MON_CFG(llccpmu));

		writel_relaxed(DISABLE, BEAC_ENABLE(llccpmu));

	}

	raw_spin_unlock(&users_lock);

}
@@ -165,16 +158,6 @@ static int qcom_llcc_pmu_probe(struct platform_device *pdev) 
		return PTR_ERR(llccpmu->lagg_base);

	}



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "beac-base");

	llccpmu->beac_base = devm_ioremap_resource(&pdev->dev, res);

	if (IS_ERR(llccpmu->beac_base)) {

		dev_err(&pdev->dev, "Can't map PMU beac base @%pa\n",

			&res->start);

		return PTR_ERR(llccpmu->beac_base);

	}



	writel_relaxed(SCALING_FACTOR, BEAC_SCALE(llccpmu));



	raw_spin_lock_init(&counter_lock);

	raw_spin_lock_init(&users_lock);