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Commit 465def2a authored by Łukasz Stelmach's avatar Łukasz Stelmach Committed by Krzysztof Kozlowski
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ARM: dts: exynos: Add DT nodes for PRNG in Exynos5 SoCs



Add nodes for Pseudo Random Number Generator in dts files describing
Exynos5 chips.

Signed-off-by: default avatarŁukasz Stelmach <l.stelmach@samsung.com>
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
parent 6351fe93
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+5 −0
Original line number Diff line number Diff line
@@ -211,6 +211,11 @@
			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
		};

		prng: rng@10830400 {
		      compatible = "samsung,exynos5250-prng";
		      reg = <0x10830400 0x200>;
		};

		g2d: g2d@10850000 {
			compatible = "samsung,exynos5250-g2d";
			reg = <0x10850000 0x1000>;
+5 −0
Original line number Diff line number Diff line
@@ -1061,6 +1061,11 @@
	pinctrl-0 = <&i2c3_bus>;
};

&prng {
	clocks = <&clock CLK_SSS>;
	clock-names = "secss";
};

&pwm {
	clocks = <&clock CLK_PWM>;
	clock-names = "timers";
+5 −0
Original line number Diff line number Diff line
@@ -333,6 +333,11 @@
	clock-names = "fin_pll", "mct";
};

&prng {
	clocks = <&clock CLK_SSS>;
	clock-names = "secss";
};

&pwm {
	clocks = <&clock CLK_PWM>;
	clock-names = "timers";
+5 −0
Original line number Diff line number Diff line
@@ -1429,6 +1429,11 @@
	clock-names = "fin_pll", "mct";
};

&prng {
	clocks = <&clock CLK_SSS>;
	clock-names = "secss";
};

&pwm {
	clocks = <&clock CLK_PWM>;
	clock-names = "timers";