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Commit 450a8de0 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Restrict GPU max power level"

parents de9f0c5e 43bcc9e7
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+8 −34
Original line number Diff line number Diff line
@@ -307,16 +307,6 @@
&gpu_opp_table {
	compatible = "operating-points-v2";

	opp-700000000 {
		opp-hz = /bits/ 64 <700000000>;
		opp-microvolt = <RPMH_REGULATOR_LEVEL_TURBO>;
	};

	opp-675000000 {
		opp-hz = /bits/ 64 <675000000>;
		opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM_L1>;
	};

	opp-585000000 {
		opp-hz = /bits/ 64 <585000000>;
		opp-microvolt = <RPMH_REGULATOR_LEVEL_NOM>;
@@ -374,54 +364,38 @@

		qcom,gpu-pwrlevel@0 {
			reg = <0>;
			qcom,gpu-freq = <700000000>;
			qcom,bus-freq = <10>;
			qcom,bus-min = <8>;
			qcom,bus-max = <10>;
		};

		qcom,gpu-pwrlevel@1 {
			reg = <1>;
			qcom,gpu-freq = <675000000>;
			qcom,bus-freq = <8>;
			qcom,bus-min = <7>;
			qcom,bus-max = <9>;
		};

		qcom,gpu-pwrlevel@2 {
			reg = <2>;
			qcom,gpu-freq = <585000000>;
			qcom,bus-freq = <7>;
			qcom,bus-min = <6>;
			qcom,bus-max = <8>;
		};

		qcom,gpu-pwrlevel@3 {
			reg = <3>;
		qcom,gpu-pwrlevel@1 {
			reg = <1>;
			qcom,gpu-freq = <427000000>;
			qcom,bus-freq = <6>;
			qcom,bus-min = <5>;
			qcom,bus-max = <7>;
		};

		qcom,gpu-pwrlevel@4 {
			reg = <4>;
		qcom,gpu-pwrlevel@2 {
			reg = <2>;
			qcom,gpu-freq = <345000000>;
			qcom,bus-freq = <3>;
			qcom,bus-min = <3>;
			qcom,bus-max = <5>;
		};

		qcom,gpu-pwrlevel@5 {
			reg = <5>;
		qcom,gpu-pwrlevel@3 {
			reg = <3>;
			qcom,gpu-freq = <257000000>;
			qcom,bus-freq = <2>;
			qcom,bus-min = <1>;
			qcom,bus-max = <3>;
		};

		qcom,gpu-pwrlevel@6 {
			reg = <6>;
		qcom,gpu-pwrlevel@4 {
			reg = <4>;
			qcom,gpu-freq = <0>;
			qcom,bus-freq = <0>;
			qcom,bus-min = <0>;