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Commit 433305b0 authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge 4.14.182 into android-4.14-stable 



Changes in 4.14.182
	ext4: add cond_resched() to ext4_protect_reserved_inode
	watchdog: Fix the race between the release of watchdog_core_data and cdev
	i2c: dev: Fix the race between the release of i2c_dev and cdev
	padata: ensure the reorder timer callback runs on the correct CPU
	padata: ensure padata_do_serial() runs on the correct CPU
	ima: Set file->f_mode instead of file->f_flags in ima_calc_file_hash()
	evm: Check also if *tfm is an error pointer in init_desc()
	ima: Fix return value of ima_write_policy()
	fix multiplication overflow in copy_fdtable()
	iommu/amd: Fix over-read of ACPI UID from IVRS table
	i2c: mux: demux-pinctrl: Fix an error handling path in 'i2c_demux_pinctrl_probe()'
	ubi: Fix seq_file usage in detailed_erase_block_info debugfs file
	gcc-common.h: Update for GCC 10
	HID: multitouch: add eGalaxTouch P80H84 support
	scsi: qla2xxx: Fix hang when issuing nvme disconnect-all in NPIV
	configfs: fix config_item refcnt leak in configfs_rmdir()
	vhost/vsock: fix packet delivery order to monitoring devices
	component: Silence bind error on -EPROBE_DEFER
	scsi: ibmvscsi: Fix WARN_ON during event pool release
	x86/apic: Move TSC deadline timer debug printk
	gtp: set NLM_F_MULTI flag in gtp_genl_dump_pdp()
	ceph: fix double unlock in handle_cap_export()
	USB: core: Fix misleading driver bug report
	platform/x86: asus-nb-wmi: Do not load on Asus T100TA and T200TA
	ARM: futex: Address build warning
	padata: set cpu_index of unused CPUs to -1
	padata: Replace delayed timer with immediate workqueue in padata_reorder
	padata: initialize pd->cpu with effective cpumask
	padata: purge get_cpu and reorder_via_wq from padata_do_serial
	arm64: fix the flush_icache_range arguments in machine_kexec
	l2tp: don't register sessions in l2tp_session_create()
	l2tp: initialise l2tp_eth sessions before registering them
	l2tp: protect sock pointer of struct pppol2tp_session with RCU
	l2tp: initialise PPP sessions before registering them
	ALSA: iec1712: Initialize STDSP24 properly when using the model=staudio option
	ALSA: pcm: fix incorrect hw_base increase
	apparmor: Fix aa_label refcnt leak in policy_update
	dmaengine: tegra210-adma: Fix an error handling path in 'tegra_adma_probe()'
	powerpc: restore alphabetic order in Kconfig
	powerpc: Remove STRICT_KERNEL_RWX incompatibility with RELOCATABLE
	powerpc/64s: Disable STRICT_KERNEL_RWX
	x86/uaccess, ubsan: Fix UBSAN vs. SMAP
	ubsan: build ubsan.c more conservatively
	libnvdimm/btt: Remove unnecessary code in btt_freelist_init
	libnvdimm/btt: Fix LBA masking during 'free list' population
	media: fdp1: Fix R-Car M3-N naming in debug message
	cxgb4: free mac_hlist properly
	cxgb4/cxgb4vf: Fix mac_hlist initialization and free
	Revert "gfs2: Don't demote a glock until its revokes are written"
	staging: iio: ad2s1210: Fix SPI reading
	staging: greybus: Fix uninitialized scalar variable
	iio: sca3000: Remove an erroneous 'get_device()'
	iio: dac: vf610: Fix an error handling path in 'vf610_dac_probe()'
	mei: release me_cl object reference
	rapidio: fix an error in get_user_pages_fast() error handling
	rxrpc: Fix a memory leak in rxkad_verify_response()
	x86/unwind/orc: Fix unwind_get_return_address_ptr() for inactive tasks
	iio: adc: stm32-adc: Use dma_request_chan() instead dma_request_slave_channel()
	iio: adc: stm32-adc: fix device used to request dma
	Linux 4.14.182

Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@google.com>
Change-Id: I5c1fd52b8c5565f2b3be89efeefc5a66fe806247
parents ca504a6c 4f68020f

Makefile

+1 −1
Original line number Diff line number Diff line 
# SPDX-License-Identifier: GPL-2.0

VERSION = 4

PATCHLEVEL = 14

SUBLEVEL = 181

SUBLEVEL = 182

EXTRAVERSION =

NAME = Petit Gorille

arch/arm/include/asm/futex.h

+7 −2
Original line number Diff line number Diff line
@@ -163,7 +163,12 @@ arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr) 
	preempt_enable();

#endif



	if (!ret)

	/*

	 * Store unconditionally. If ret != 0 the extra store is the least

	 * of the worries but GCC cannot figure out that __futex_atomic_op()

	 * is either setting ret to -EFAULT or storing the old value in

	 * oldval which results in a uninitialized warning at the call site.

	 */

	*oval = oldval;



	return ret;

arch/arm64/kernel/machine_kexec.c

+2 −1
Original line number Diff line number Diff line
@@ -184,6 +184,7 @@ void machine_kexec(struct kimage *kimage) 
	/* Flush the reboot_code_buffer in preparation for its execution. */

	__flush_dcache_area(reboot_code_buffer, arm64_relocate_new_kernel_size);

	flush_icache_range((uintptr_t)reboot_code_buffer,

			   (uintptr_t)reboot_code_buffer +

			   arm64_relocate_new_kernel_size);



	/* Flush the kimage list and its buffers. */

arch/powerpc/Kconfig

+2 −2
Original line number Diff line number Diff line
@@ -141,12 +141,14 @@ config PPC 
	select ARCH_HAS_GCOV_PROFILE_ALL

	select ARCH_HAS_SCALED_CPUTIME		if VIRT_CPU_ACCOUNTING_NATIVE

	select ARCH_HAS_SG_CHAIN

	select ARCH_HAS_STRICT_KERNEL_RWX	if (PPC32 && !HIBERNATION)

	select ARCH_HAS_TICK_BROADCAST		if GENERIC_CLOCKEVENTS_BROADCAST

	select ARCH_HAS_UBSAN_SANITIZE_ALL

	select ARCH_HAS_ZONE_DEVICE		if PPC_BOOK3S_64

	select ARCH_HAVE_NMI_SAFE_CMPXCHG

	select ARCH_MIGHT_HAVE_PC_PARPORT

	select ARCH_MIGHT_HAVE_PC_SERIO

	select ARCH_OPTIONAL_KERNEL_RWX		if ARCH_HAS_STRICT_KERNEL_RWX

	select ARCH_SUPPORTS_ATOMIC_RMW

	select ARCH_SUPPORTS_DEFERRED_STRUCT_PAGE_INIT

	select ARCH_USE_BUILTIN_BSWAP
@@ -178,8 +180,6 @@ config PPC 
	select HAVE_ARCH_MMAP_RND_COMPAT_BITS	if COMPAT

	select HAVE_ARCH_SECCOMP_FILTER

	select HAVE_ARCH_TRACEHOOK

	select ARCH_HAS_STRICT_KERNEL_RWX	if ((PPC_BOOK3S_64 || PPC32) && !RELOCATABLE && !HIBERNATION)

	select ARCH_OPTIONAL_KERNEL_RWX		if ARCH_HAS_STRICT_KERNEL_RWX

	select HAVE_CBPF_JIT			if !PPC64

	select HAVE_CONTEXT_TRACKING		if PPC64

	select HAVE_DEBUG_KMEMLEAK

arch/x86/kernel/apic/apic.c

+14 −13
Original line number Diff line number Diff line
@@ -353,8 +353,6 @@ static void __setup_APIC_LVTT(unsigned int clocks, int oneshot, int irqen) 
		 * According to Intel, MFENCE can do the serialization here.

		 */

		asm volatile("mfence" : : : "memory");



		printk_once(KERN_DEBUG "TSC deadline timer enabled\n");

		return;

	}
@@ -553,7 +551,7 @@ static DEFINE_PER_CPU(struct clock_event_device, lapic_events); 
#define DEADLINE_MODEL_MATCH_REV(model, rev)	\

	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, (unsigned long)rev }



static u32 hsx_deadline_rev(void)

static __init u32 hsx_deadline_rev(void)

{

	switch (boot_cpu_data.x86_stepping) {

	case 0x02: return 0x3a; /* EP */
@@ -563,7 +561,7 @@ static u32 hsx_deadline_rev(void) 
	return ~0U;

}



static u32 bdx_deadline_rev(void)

static __init u32 bdx_deadline_rev(void)

{

	switch (boot_cpu_data.x86_stepping) {

	case 0x02: return 0x00000011;
@@ -575,7 +573,7 @@ static u32 bdx_deadline_rev(void) 
	return ~0U;

}



static u32 skx_deadline_rev(void)

static __init u32 skx_deadline_rev(void)

{

	switch (boot_cpu_data.x86_stepping) {

	case 0x03: return 0x01000136;
@@ -588,7 +586,7 @@ static u32 skx_deadline_rev(void) 
	return ~0U;

}



static const struct x86_cpu_id deadline_match[] = {

static const struct x86_cpu_id deadline_match[] __initconst = {

	DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_HASWELL_X,	hsx_deadline_rev),

	DEADLINE_MODEL_MATCH_REV ( INTEL_FAM6_BROADWELL_X,	0x0b000020),

	DEADLINE_MODEL_MATCH_FUNC( INTEL_FAM6_BROADWELL_XEON_D,	bdx_deadline_rev),
@@ -610,18 +608,19 @@ static const struct x86_cpu_id deadline_match[] = { 
	{},

};



static void apic_check_deadline_errata(void)

static __init bool apic_validate_deadline_timer(void)

{

	const struct x86_cpu_id *m;

	u32 rev;



	if (!boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER) ||

	    boot_cpu_has(X86_FEATURE_HYPERVISOR))

		return;

	if (!boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER))

		return false;

	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))

		return true;



	m = x86_match_cpu(deadline_match);

	if (!m)

		return;

		return true;



	/*

	 * Function pointers will have the MSB set due to address layout,
@@ -633,11 +632,12 @@ static void apic_check_deadline_errata(void) 
		rev = (u32)m->driver_data;



	if (boot_cpu_data.microcode >= rev)

		return;

		return true;



	setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER);

	pr_err(FW_BUG "TSC_DEADLINE disabled due to Errata; "

	       "please update microcode to version: 0x%x (or later)\n", rev);

	return false;

}



/*
@@ -1914,7 +1914,8 @@ void __init init_apic_mappings(void) 
{

	unsigned int new_apicid;



	apic_check_deadline_errata();

	if (apic_validate_deadline_timer())

		pr_debug("TSC deadline timer available\n");



	if (x2apic_mode) {

		boot_cpu_physical_apicid = read_apic_id();