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Commit 40045465 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
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drm/i915: Reorganize FBC function pointer initializaition 



Initialize the FBC vfuncs on gen2 and gen3 chipsets. Also make
a clean split for gen7+ vs. gen5+ vfunc initialization.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent c5a44aa0

drivers/gpu/drm/i915/intel_pm.c

+7 −9
Original line number Diff line number Diff line
@@ -5956,25 +5956,23 @@ void intel_init_pm(struct drm_device *dev) 
	struct drm_i915_private *dev_priv = dev->dev_private;



	if (I915_HAS_FBC(dev)) {

		if (HAS_PCH_SPLIT(dev)) {

		if (INTEL_INFO(dev)->gen >= 7) {

			dev_priv->display.fbc_enabled = ironlake_fbc_enabled;

			if (IS_IVYBRIDGE(dev) || IS_HASWELL(dev))

				dev_priv->display.enable_fbc =

					gen7_enable_fbc;

			else

				dev_priv->display.enable_fbc =

					ironlake_enable_fbc;

			dev_priv->display.enable_fbc = gen7_enable_fbc;

			dev_priv->display.disable_fbc = ironlake_disable_fbc;

		} else if (INTEL_INFO(dev)->gen >= 5) {

			dev_priv->display.fbc_enabled = ironlake_fbc_enabled;

			dev_priv->display.enable_fbc = ironlake_enable_fbc;

			dev_priv->display.disable_fbc = ironlake_disable_fbc;

		} else if (IS_GM45(dev)) {

			dev_priv->display.fbc_enabled = g4x_fbc_enabled;

			dev_priv->display.enable_fbc = g4x_enable_fbc;

			dev_priv->display.disable_fbc = g4x_disable_fbc;

		} else if (IS_CRESTLINE(dev)) {

		} else {

			dev_priv->display.fbc_enabled = i8xx_fbc_enabled;

			dev_priv->display.enable_fbc = i8xx_enable_fbc;

			dev_priv->display.disable_fbc = i8xx_disable_fbc;

		}

		/* 855GM needs testing */

	}



	/* For cxsr */