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Commit 3efc7023 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/resource' into next 

* pci/resource:
  unicore32/PCI: Remove pci=firmware command line parameter handling
  ARM/PCI: Remove arch-specific pcibios_enable_device()
  ARM64/PCI: Remove arch-specific pcibios_enable_device()
  MIPS/PCI: Claim bus resources on PCI_PROBE_ONLY set-ups
  ARM/PCI: Claim bus resources on PCI_PROBE_ONLY set-ups
  PCI: generic: Claim bus resources on PCI_PROBE_ONLY set-ups
  PCI: Add generic pci_bus_claim_resources()
  alx: Use pci_(request|release)_mem_regions
  ethernet/intel: Use pci_(request|release)_mem_regions
  GenWQE: Use pci_(request|release)_mem_regions
  lpfc: Use pci_(request|release)_mem_regions
  NVMe: Use pci_(request|release)_mem_regions
  PCI: Add helpers to request/release memory and I/O regions
  PCI: Extending pci=resource_alignment to specify device/vendor IDs
  sparc/PCI: Implement pci_resource_to_user() with pcibios_resource_to_bus()
  powerpc/pci: Implement pci_resource_to_user() with pcibios_resource_to_bus()
  microblaze/PCI: Implement pci_resource_to_user() with pcibios_resource_to_bus()
  PCI: Unify pci_resource_to_user() declarations
  microblaze/PCI: Remove useless __pci_mmap_set_pgprot()
  powerpc/pci: Remove __pci_mmap_set_pgprot()
  PCI: Ignore write combining when mapping I/O port space
parents a00c74c1 ab2b750c

Documentation/kernel-parameters.txt

+2 −0
Original line number Diff line number Diff line
@@ -2998,6 +2998,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted. 
		resource_alignment=

				Format:

				[<order of align>@][<domain>:]<bus>:<slot>.<func>[; ...]

				[<order of align>@]pci:<vendor>:<device>\

						[:<subvendor>:<subdevice>][; ...]

				Specifies alignment and device to reassign

				aligned memory resources.

				If <order of align> is not specified,

arch/arm/kernel/bios32.c

+9 −23
Original line number Diff line number Diff line
@@ -515,25 +515,23 @@ void pci_common_init_dev(struct device *parent, struct hw_pci *hw) 
	list_for_each_entry(sys, &head, node) {

		struct pci_bus *bus = sys->bus;



		if (!pci_has_flag(PCI_PROBE_ONLY)) {

			struct pci_bus *child;



		/*

			 * Size the bridge windows.

		 * We insert PCI resources into the iomem_resource and

		 * ioport_resource trees in either pci_bus_claim_resources()

		 * or pci_bus_assign_resources().

		 */

			pci_bus_size_bridges(bus);

		if (pci_has_flag(PCI_PROBE_ONLY)) {

			pci_bus_claim_resources(bus);

		} else {

			struct pci_bus *child;



			/*

			 * Assign resources.

			 */

			pci_bus_size_bridges(bus);

			pci_bus_assign_resources(bus);



			list_for_each_entry(child, &bus->children, node)

				pcie_bus_configure_settings(child);

		}

		/*

		 * Tell drivers about devices found.

		 */



		pci_bus_add_devices(bus);

	}

}
@@ -590,18 +588,6 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res, 
	return start;

}



/**

 * pcibios_enable_device - Enable I/O and memory.

 * @dev: PCI device to be enabled

 */

int pcibios_enable_device(struct pci_dev *dev, int mask)

{

	if (pci_has_flag(PCI_PROBE_ONLY))

		return 0;



	return pci_enable_resources(dev, mask);

}



int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,

			enum pci_mmap_state mmap_state, int write_combine)

{

arch/arm64/kernel/pci.c

+0 −13
Original line number Diff line number Diff line
@@ -39,19 +39,6 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res, 
	return res->start;

}



/**

 * pcibios_enable_device - Enable I/O and memory.

 * @dev: PCI device to be enabled

 * @mask: bitmask of BARs to enable

 */

int pcibios_enable_device(struct pci_dev *dev, int mask)

{

	if (pci_has_flag(PCI_PROBE_ONLY))

		return 0;



	return pci_enable_resources(dev, mask);

}



/*

 * Try to assign the IRQ number when probing a new device

 */

arch/microblaze/include/asm/pci.h

+0 −3
Original line number Diff line number Diff line
@@ -82,9 +82,6 @@ extern pgprot_t pci_phys_mem_access_prot(struct file *file, 
					 pgprot_t prot);



#define HAVE_ARCH_PCI_RESOURCE_TO_USER

extern void pci_resource_to_user(const struct pci_dev *dev, int bar,

				 const struct resource *rsrc,

				 resource_size_t *start, resource_size_t *end);



extern void pcibios_setup_bus_devices(struct pci_bus *bus);

extern void pcibios_setup_bus_self(struct pci_bus *bus);

arch/microblaze/pci/pci-common.c

+15 −58
Original line number Diff line number Diff line
@@ -218,33 +218,6 @@ static struct resource *__pci_mmap_make_offset(struct pci_dev *dev, 
	return NULL;

}



/*

 * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci

 * device mapping.

 */

static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,

				      pgprot_t protection,

				      enum pci_mmap_state mmap_state,

				      int write_combine)

{

	pgprot_t prot = protection;



	/* Write combine is always 0 on non-memory space mappings. On

	 * memory space, if the user didn't pass 1, we check for a

	 * "prefetchable" resource. This is a bit hackish, but we use

	 * this to workaround the inability of /sysfs to provide a write

	 * combine bit

	 */

	if (mmap_state != pci_mmap_mem)

		write_combine = 0;

	else if (write_combine == 0) {

		if (rp->flags & IORESOURCE_PREFETCH)

			write_combine = 1;

	}



	return pgprot_noncached(prot);

}



/*

 * This one is used by /dev/mem and fbdev who have no clue about the

 * PCI device, it tries to find the PCI device first and calls the
@@ -317,9 +290,7 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, 
		return -EINVAL;



	vma->vm_pgoff = offset >> PAGE_SHIFT;

	vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp,

						  vma->vm_page_prot,

						  mmap_state, write_combine);

	vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);



	ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,

			       vma->vm_end - vma->vm_start, vma->vm_page_prot);
@@ -473,39 +444,25 @@ void pci_resource_to_user(const struct pci_dev *dev, int bar, 
			  const struct resource *rsrc,

			  resource_size_t *start, resource_size_t *end)

{

	struct pci_controller *hose = pci_bus_to_host(dev->bus);

	resource_size_t offset = 0;

	struct pci_bus_region region;



	if (hose == NULL)

	if (rsrc->flags & IORESOURCE_IO) {

		pcibios_resource_to_bus(dev->bus, &region,

					(struct resource *) rsrc);

		*start = region.start;

		*end = region.end;

		return;

	}



	if (rsrc->flags & IORESOURCE_IO)

		offset = (unsigned long)hose->io_base_virt - _IO_BASE;



	/* We pass a fully fixed up address to userland for MMIO instead of

	 * a BAR value because X is lame and expects to be able to use that

	/* We pass a CPU physical address to userland for MMIO instead of a

	 * BAR value because X is lame and expects to be able to use that

	 * to pass to /dev/mem!

	 *

	 * That means that we'll have potentially 64 bits values where some

	 * userland apps only expect 32 (like X itself since it thinks only

	 * Sparc has 64 bits MMIO) but if we don't do that, we break it on

	 * 32 bits CHRPs :-(

	 *

	 * Hopefully, the sysfs insterface is immune to that gunk. Once X

	 * has been fixed (and the fix spread enough), we can re-enable the

	 * 2 lines below and pass down a BAR value to userland. In that case

	 * we'll also have to re-enable the matching code in

	 * __pci_mmap_make_offset().

	 *

	 * BenH.

	 * That means we may have 64-bit values where some apps only expect

	 * 32 (like X itself since it thinks only Sparc has 64-bit MMIO).

	 */

#if 0

	else if (rsrc->flags & IORESOURCE_MEM)

		offset = hose->pci_mem_offset;

#endif



	*start = rsrc->start - offset;

	*end = rsrc->end - offset;

	*start = rsrc->start;

	*end = rsrc->end;

}



/**