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Commit 3ee471c8 authored by Deepak Kumar's avatar Deepak Kumar
Browse files

msm: kgsl: Add support for gaming bin detection 



User mode driver is using speed bin value to determine
whether part is gaming SKU or not but on some parts
speed bin value is same for both gaming and non-gaming
SKU and differentiation happens based on whether gaming
bin fuse bit is set or not. Add support to read gaming
bin fuse bit and return its value to user mode driver.
This will allow user mode driver to detect whether part
gaming SKU or not.

Change-Id: Ia34762167e47595045a15d073ae0f09917903069
Signed-off-by: default avatarDeepak Kumar <dkumar@codeaurora.org>
parent 92a10f31

Documentation/devicetree/bindings/gpu/adreno.txt

+8 −0
Original line number Original line Diff line number Diff line
@@ -144,6 +144,14 @@ Optional Properties: 
				mask   - mask for the relevant bits in the efuse register.

				mask   - mask for the relevant bits in the efuse register.

				shift  - number of bits to right shift to get the speed bin

				shift  - number of bits to right shift to get the speed bin

				value.

				value.



- qcom,gpu-gaming-bin:  	GPU gaming bin information in the format

				<offset mask shift>

				offset - offset of the efuse register from the base.

				mask   - mask for the relevant bits in the efuse register.

				shift  - number of bits to right shift to get the value of

				relevant bits.



- qcom,gpu-disable-fuse:	GPU disable fuse

- qcom,gpu-disable-fuse:	GPU disable fuse

				<offset mask shift>

				<offset mask shift>

				offset - offset of the efuse register from the base.

				offset - offset of the efuse register from the base.

drivers/gpu/msm/adreno.c

+21 −0
Original line number Original line Diff line number Diff line
@@ -2699,6 +2699,27 @@ static int adreno_getproperty(struct kgsl_device *device, 
			status = 0;

			status = 0;

		}

		}

		break;

		break;



	case KGSL_PROP_GAMING_BIN:

	{

		unsigned int gaming_bin;



		if (sizebytes != sizeof(unsigned int)) {

			status = -EINVAL;

			break;

		}



		gaming_bin = adreno_dev->gaming_bin ? 1 : 0;



		if (copy_to_user(value, &gaming_bin,

					sizeof(unsigned int))) {

			status = -EFAULT;

			break;

		}

		status = 0;

	}

	break;



	default:

	default:

		status = -EINVAL;

		status = -EINVAL;

	}

	}

drivers/gpu/msm/adreno.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -519,6 +519,7 @@ enum gpu_coresight_sources { 
 * @gpuhtw_llc_slice_enable: To enable the GPUHTW system cache slice or not

 * @gpuhtw_llc_slice_enable: To enable the GPUHTW system cache slice or not

 * @zap_loaded: Used to track if zap was successfully loaded or not

 * @zap_loaded: Used to track if zap was successfully loaded or not

 * @soc_hw_rev: Indicate which SOC hardware revision to use

 * @soc_hw_rev: Indicate which SOC hardware revision to use

 * @gaming_bin: Indicate whether part is a gaming SKU or not

 */

 */

struct adreno_device {

struct adreno_device {

	struct kgsl_device dev;    /* Must be first field in this struct */

	struct kgsl_device dev;    /* Must be first field in this struct */
@@ -599,6 +600,7 @@ struct adreno_device { 
	bool gpuhtw_llc_slice_enable;

	bool gpuhtw_llc_slice_enable;

	unsigned int zap_loaded;

	unsigned int zap_loaded;

	unsigned int soc_hw_rev;

	unsigned int soc_hw_rev;

	bool gaming_bin;

};

};





/**

/**

drivers/gpu/msm/adreno_a6xx.c

+17 −0
Original line number Original line Diff line number Diff line
@@ -2836,6 +2836,22 @@ static int a6xx_enable_pwr_counters(struct adreno_device *adreno_dev, 
	return 0;

	return 0;

}

}





static void a6xx_efuse_gaming_bin(struct adreno_device *adreno_dev)

{

	unsigned int val;

	unsigned int gaming_bin[3];

	struct kgsl_device *device = &adreno_dev->dev;



	if (of_property_read_u32_array(device->pdev->dev.of_node,

		"qcom,gpu-gaming-bin", gaming_bin, 3))

		return;



	adreno_efuse_read_u32(adreno_dev, gaming_bin[0], &val);



	/* If fuse bit is set that means its not a gaming bin */

	adreno_dev->gaming_bin = !((val & gaming_bin[1]) >> gaming_bin[2]);

}



static void a6xx_efuse_speed_bin(struct adreno_device *adreno_dev)

static void a6xx_efuse_speed_bin(struct adreno_device *adreno_dev)

{

{

	unsigned int val;

	unsigned int val;
@@ -2858,6 +2874,7 @@ static const struct { 
	{ adreno_is_a615_family, a6xx_efuse_speed_bin },

	{ adreno_is_a615_family, a6xx_efuse_speed_bin },

	{ adreno_is_a612, a6xx_efuse_speed_bin },

	{ adreno_is_a612, a6xx_efuse_speed_bin },

	{ adreno_is_a610, a6xx_efuse_speed_bin },

	{ adreno_is_a610, a6xx_efuse_speed_bin },

	{ adreno_is_a610, a6xx_efuse_gaming_bin },

};

};





static void a6xx_check_features(struct adreno_device *adreno_dev)

static void a6xx_check_features(struct adreno_device *adreno_dev)

include/uapi/linux/msm_kgsl.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -336,6 +336,8 @@ enum kgsl_timestamp_type { 
#define KGSL_PROP_SECURE_BUFFER_ALIGNMENT 0x23

#define KGSL_PROP_SECURE_BUFFER_ALIGNMENT 0x23

#define KGSL_PROP_SECURE_CTXT_SUPPORT 0x24

#define KGSL_PROP_SECURE_CTXT_SUPPORT 0x24

#define KGSL_PROP_SPEED_BIN		0x25

#define KGSL_PROP_SPEED_BIN		0x25

#define KGSL_PROP_GAMING_BIN		0x26







struct kgsl_shadowprop {

struct kgsl_shadowprop {

	unsigned long gpuaddr;

	unsigned long gpuaddr;