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Commit 3ec5e8d8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC non-urgent fixes from Arnd Bergmann:
 "As usual, we queue up a few fixes that don't seem urgent enough to go
  in through -rc, or that just came a little too late given their size.

  The zx fixes make the platform finally boot on real hardware, the
  davinci and imx31 get the DT support working better for some of the
  machines that are still normally used with classic board files. One
  tegra fix is important for new bootloader versions, but the bug has
  been around for a while without anyone noticing.

  The other changes are mostly cosmetic"

* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
  arm64: tegra: Add missing Smaug revision
  arm64: tegra: Add VDD_GPU regulator to Jetson TX1
  arm64: dts: zte: clean up gic-v3 redistributor properties
  arm64: dts: zx: Fix gic GICR property
  bus: vexpress-config: fix device reference leak
  soc: ti: qmss: fix the case when !SMP
  ARM: lpc32xx: drop duplicate header device.h
  ARM: ixp4xx: drop duplicate header gpio.h
  ARM: socfpga: fix spelling mistake in error message
  ARM: dts: imx6q-cm-fx6: fix fec pinctrl
  ARM: dts: imx7d-pinfunc: fix UART pinmux defines
  ARM: dts: imx6qp: correct LDB clock inputs
  ARM: OMAP2+: pm-debug: Use seq_putc() in two functions
  ARM: OMAP2+: Remove the omapdss_early_init_of() function
  mfd: tps65217: Fix mismatched interrupt number
  ARM: zx: Fix error handling
  ARM: spear: Fix error handling
  ARM: davinci: da850: Fix pwm name matching
  ARM: clk: imx31: properly init clocks for machines with DT
  clk: imx31: fix rewritten input argument of mx31_clocks_init()
  ...
parents 09dee2a6 816c60c1

Documentation/devicetree/bindings/clock/imx31-clock.txt

+1 −1
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ Examples: 
clks: ccm@53f80000{

	compatible = "fsl,imx31-ccm";

	reg = <0x53f80000 0x4000>;

	interrupts = <0 31 0x04 0 53 0x04>;

	interrupts = <31>, <53>;

	#clock-cells = <1>;

};

arch/arm/boot/dts/imx31.dtsi

+7 −7
Original line number Diff line number Diff line
@@ -118,13 +118,6 @@ 
				interrupts = <19>;

				clocks = <&clks 25>;

			};



			clks: ccm@53f80000{

				compatible = "fsl,imx31-ccm";

				reg = <0x53f80000 0x4000>;

				interrupts = <0 31 0x04 0 53 0x04>;

				#clock-cells = <1>;

			};

		};



		aips@53f00000 { /* AIPS2 */
@@ -134,6 +127,13 @@ 
			reg = <0x53f00000 0x100000>;

			ranges;



			clks: ccm@53f80000{

				compatible = "fsl,imx31-ccm";

				reg = <0x53f80000 0x4000>;

				interrupts = <31>, <53>;

				#clock-cells = <1>;

			};



			gpt: timer@53f90000 {

				compatible = "fsl,imx31-gpt";

				reg = <0x53f90000 0x4000>;

arch/arm/boot/dts/imx6q-cm-fx6.dts

+0 −1
Original line number Diff line number Diff line
@@ -183,7 +183,6 @@ 
			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x1b0b0

			MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0

			MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0

			MX6QDL_PAD_GPIO_16__ENET_REF_CLK	0x4001b0a8

		>;

	};

arch/arm/boot/dts/imx6qp.dtsi

+10 −0
Original line number Diff line number Diff line
@@ -87,3 +87,13 @@ 
		};

	};

};



&ldb {

	clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,

		 <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,

		 <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,

		 <&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>;

	clock-names = "di0_pll", "di1_pll",

		      "di0_sel", "di1_sel", "di2_sel", "di3_sel",

		      "di0", "di1";

};

arch/arm/boot/dts/imx7d-pinfunc.h

+8 −4
Original line number Diff line number Diff line
@@ -43,26 +43,30 @@ 
#define MX7D_PAD_GPIO1_IO04__GPIO1_IO4                            0x0010 0x0040 0x0000 0x0 0x0

#define MX7D_PAD_GPIO1_IO04__USB_OTG1_OC                          0x0010 0x0040 0x072C 0x1 0x1

#define MX7D_PAD_GPIO1_IO04__FLEXTIMER1_CH4                       0x0010 0x0040 0x0594 0x2 0x1

#define MX7D_PAD_GPIO1_IO04__UART5_CTS_B                          0x0010 0x0040 0x0710 0x3 0x4

#define MX7D_PAD_GPIO1_IO04__UART5_DCE_CTS                        0x0010 0x0040 0x0000 0x3 0x0

#define MX7D_PAD_GPIO1_IO04__UART5_DTE_RTS                        0x0010 0x0040 0x0710 0x3 0x4

#define MX7D_PAD_GPIO1_IO04__I2C1_SCL                             0x0010 0x0040 0x05D4 0x4 0x2

#define MX7D_PAD_GPIO1_IO04__OBSERVE3_OUT                         0x0010 0x0040 0x0000 0x6 0x0

#define MX7D_PAD_GPIO1_IO05__GPIO1_IO5                            0x0014 0x0044 0x0000 0x0 0x0

#define MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR                         0x0014 0x0044 0x0000 0x1 0x0

#define MX7D_PAD_GPIO1_IO05__FLEXTIMER1_CH5                       0x0014 0x0044 0x0598 0x2 0x1

#define MX7D_PAD_GPIO1_IO05__UART5_RTS_B                          0x0014 0x0044 0x0710 0x3 0x5

#define MX7D_PAD_GPIO1_IO05__UART5_DCE_RTS                        0x0014 0x0044 0x0710 0x3 0x5

#define MX7D_PAD_GPIO1_IO05__UART5_DTE_CTS                        0x0014 0x0044 0x0000 0x3 0x0

#define MX7D_PAD_GPIO1_IO05__I2C1_SDA                             0x0014 0x0044 0x05D8 0x4 0x2

#define MX7D_PAD_GPIO1_IO05__OBSERVE4_OUT                         0x0014 0x0044 0x0000 0x6 0x0

#define MX7D_PAD_GPIO1_IO06__GPIO1_IO6                            0x0018 0x0048 0x0000 0x0 0x0

#define MX7D_PAD_GPIO1_IO06__USB_OTG2_OC                          0x0018 0x0048 0x0728 0x1 0x1

#define MX7D_PAD_GPIO1_IO06__FLEXTIMER1_CH6                       0x0018 0x0048 0x059C 0x2 0x1

#define MX7D_PAD_GPIO1_IO06__UART5_RX_DATA                        0x0018 0x0048 0x0714 0x3 0x4

#define MX7D_PAD_GPIO1_IO06__UART5_DCE_RX                         0x0018 0x0048 0x0714 0x3 0x4

#define MX7D_PAD_GPIO1_IO06__UART5_DTE_TX                         0x0018 0x0048 0x0000 0x3 0x0

#define MX7D_PAD_GPIO1_IO06__I2C2_SCL                             0x0018 0x0048 0x05DC 0x4 0x2

#define MX7D_PAD_GPIO1_IO06__CCM_WAIT                             0x0018 0x0048 0x0000 0x5 0x0

#define MX7D_PAD_GPIO1_IO06__KPP_ROW4                             0x0018 0x0048 0x0624 0x6 0x1

#define MX7D_PAD_GPIO1_IO07__GPIO1_IO7                            0x001C 0x004C 0x0000 0x0 0x0

#define MX7D_PAD_GPIO1_IO07__USB_OTG2_PWR                         0x001C 0x004C 0x0000 0x1 0x0

#define MX7D_PAD_GPIO1_IO07__FLEXTIMER1_CH7                       0x001C 0x004C 0x05A0 0x2 0x1

#define MX7D_PAD_GPIO1_IO07__UART5_TX_DATA                        0x001C 0x004C 0x0714 0x3 0x5

#define MX7D_PAD_GPIO1_IO07__UART5_DCE_TX                         0x001C 0x004C 0x0000 0x3 0x0

#define MX7D_PAD_GPIO1_IO07__UART5_DTE_RX                         0x001C 0x004C 0x0714 0x3 0x5

#define MX7D_PAD_GPIO1_IO07__I2C2_SDA                             0x001C 0x004C 0x05E0 0x4 0x2

#define MX7D_PAD_GPIO1_IO07__CCM_STOP                             0x001C 0x004C 0x0000 0x5 0x0

#define MX7D_PAD_GPIO1_IO07__KPP_COL4                             0x001C 0x004C 0x0604 0x6 0x1