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Commit 3dc3336b authored by Stefan Agner's avatar Stefan Agner Committed by Shawn Guo
Browse files

ARM: dts: imx7-colibri: add Audio support 



Add audio support via on module I2S SGTL5000 codec.

Signed-off-by: default avatarStefan Agner <stefan@agner.ch>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 8e901935

arch/arm/boot/dts/imx7-colibri.dtsi

+40 −1
Original line number Diff line number Diff line
@@ -66,6 +66,22 @@ 
		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

	};



	sound {

		compatible = "simple-audio-card";

		simple-audio-card,name = "imx7-sgtl5000";

		simple-audio-card,format = "i2s";

		simple-audio-card,bitclock-master = <&dailink_master>;

		simple-audio-card,frame-master = <&dailink_master>;

		simple-audio-card,cpu {

			sound-dai = <&sai1>;

		};



		dailink_master: simple-audio-card,codec {

			sound-dai = <&codec>;

			clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;

		};

	};

};



&adc1 {
@@ -103,6 +119,18 @@ 
	pinctrl-0 = <&pinctrl_i2c1 &pinctrl_i2c1_int>;

	status = "okay";



	codec: sgtl5000@0a {

		compatible = "fsl,sgtl5000";

		#sound-dai-cells = <0>;

		reg = <0x0a>;

		clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>;

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_sai1_mclk>;

		VDDA-supply = <&reg_module_3v3_avdd>;

		VDDIO-supply = <&reg_module_3v3>;

		VDDD-supply = <&reg_DCDC3>;

	};



	ad7879@2c {

		compatible = "adi,ad7879-1";

		reg = <0x2c>;
@@ -223,6 +251,12 @@ 
	vin-supply = <&reg_DCDC3>;

};



&sai1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_sai1>;

	status = "okay";

};



&snvs_pwrkey {

	status = "disabled";

};
@@ -542,13 +576,18 @@ 


	pinctrl_sai1: sai1-grp {

		fsl,pins = <

			MX7D_PAD_SAI1_MCLK__SAI1_MCLK           0x1f

			MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK     0x1f

			MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC	0x1f

			MX7D_PAD_ENET1_COL__SAI1_TX_DATA0	0x30

			MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0	0x1f

		>;

	};



	pinctrl_sai1_mclk: sai1grp_mclk {

		fsl,pins = <

			MX7D_PAD_SAI1_MCLK__SAI1_MCLK           0x1f

		>;

	};

};



&iomuxc_lpsr {