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Commit 3c425df7 authored by Steven J. Hill's avatar Steven J. Hill Committed by Ralf Baechle
Browse files

MIPS: Octeon: Make CSR functions node aware. 



Updates CSR read/write functions to be aware of nodes present in
systems with CIU3 support.

Signed-off-by: default avatarSteven J. Hill <Steven.Hill@cavium.com>
Acked-by: default avatarDavid Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: linux-watchdog@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17211/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 1fb6e539

arch/mips/include/asm/octeon/cvmx.h

+28 −0
Original line number Diff line number Diff line
@@ -357,6 +357,34 @@ static inline unsigned int cvmx_get_local_core_num(void) 
	return cvmx_get_core_num() & ((1 << CVMX_NODE_NO_SHIFT) - 1);

}



#define CVMX_NODE_BITS         (2)     /* Number of bits to define a node */

#define CVMX_MAX_NODES         (1 << CVMX_NODE_BITS)

#define CVMX_NODE_IO_SHIFT     (36)

#define CVMX_NODE_MEM_SHIFT    (40)

#define CVMX_NODE_IO_MASK      ((uint64_t)CVMX_NODE_MASK << CVMX_NODE_IO_SHIFT)



static inline void cvmx_write_csr_node(uint64_t node, uint64_t csr_addr,

				       uint64_t val)

{

	uint64_t composite_csr_addr, node_addr;



	node_addr = (node & CVMX_NODE_MASK) << CVMX_NODE_IO_SHIFT;

	composite_csr_addr = (csr_addr & ~CVMX_NODE_IO_MASK) | node_addr;



	cvmx_write64_uint64(composite_csr_addr, val);

	if (((csr_addr >> 40) & 0x7ffff) == (0x118))

		cvmx_read64_uint64(CVMX_MIO_BOOT_BIST_STAT | node_addr);

}



static inline uint64_t cvmx_read_csr_node(uint64_t node, uint64_t csr_addr)

{

	uint64_t node_addr;



	node_addr = (csr_addr & ~CVMX_NODE_IO_MASK) |

		    (node & CVMX_NODE_MASK) << CVMX_NODE_IO_SHIFT;

	return cvmx_read_csr(node_addr);

}



/**

 * Returns the number of bits set in the provided value.

 * Simple wrapper for POP instruction.