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Commit 3b26f1ce authored by Govinda Rajulu Chenna's avatar Govinda Rajulu Chenna Committed by Gerrit - the friendly Code Review server
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clk/qcom/mdss: add DSI 7nm PLL support 



This change adds support for DSI 7nm PLL configuration.
This change also registers the list of clocks, those are
possible to be sourced from 7nm PLL, with clock driver.

Change-Id: Ib6a95983e519b8e22208381ce0f7938fa4b0aeae
Signed-off-by: default avatarGovinda Rajulu Chenna <gchenna@codeaurora.org>
parent 107c723c

Documentation/devicetree/bindings/fb/mdss-pll.txt

+2 −1
Original line number Diff line number Diff line
@@ -16,7 +16,8 @@ Required properties: 
                        "qcom,mdss_hdmi_pll_8996_v3", "qcom,mdss_hdmi_pll_8996_v3_1p8",

                        "qcom,mdss_edp_pll_8996_v3", "qcom,mdss_edp_pll_8996_v3_1p8",

                        "qcom,mdss_dsi_pll_10nm", "qcom,mdss_dp_pll_8998",

                        "qcom,mdss_hdmi_pll_8998", "qcom,mdss_dp_pll_10nm".

                        "qcom,mdss_hdmi_pll_8998", "qcom,mdss_dp_pll_10nm",

                        "qcom,mdss_dsi_pll_7nm".

- cell-index:		Specifies the controller used

- reg:			offset and length of the register set for the device.

- reg-names :		names to refer to register sets related to this device

drivers/clk/qcom/mdss/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -3,4 +3,5 @@ obj-$(CONFIG_QCOM_MDSS_PLL) += mdss-pll.o 
obj-$(CONFIG_QCOM_MDSS_PLL) += mdss-dsi-pll-10nm.o

obj-$(CONFIG_QCOM_MDSS_PLL) += mdss-dp-pll-10nm.o

obj-$(CONFIG_QCOM_MDSS_PLL) += mdss-dp-pll-10nm-util.o

obj-$(CONFIG_QCOM_MDSS_PLL) += mdss-dsi-pll-7nm.o

drivers/clk/qcom/mdss/mdss-dsi-pll-7nm.c

0 → 100644
+1824 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/clk/qcom/mdss/mdss-dsi-pll.h

+4 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.

/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -49,6 +49,9 @@ struct dsi_pll_vco_clk { 
int dsi_pll_clock_register_10nm(struct platform_device *pdev,

				struct mdss_pll_resources *pll_res);



int dsi_pll_clock_register_7nm(struct platform_device *pdev,

				struct mdss_pll_resources *pll_res);



static inline struct dsi_pll_vco_clk *to_vco_clk_hw(struct clk_hw *hw)

{

	return container_of(hw, struct dsi_pll_vco_clk, hw);

drivers/clk/qcom/mdss/mdss-pll.c

+7 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.

/* Copyright (c) 2013-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -129,6 +129,8 @@ static int mdss_pll_resource_parse(struct platform_device *pdev, 
		pll_res->pll_interface_type = MDSS_DSI_PLL_10NM;

	if (!strcmp(compatible_stream, "qcom,mdss_dp_pll_10nm"))

		pll_res->pll_interface_type = MDSS_DP_PLL_10NM;

	if (!strcmp(compatible_stream, "qcom,mdss_dsi_pll_7nm"))

		pll_res->pll_interface_type = MDSS_DSI_PLL_7NM;

	else

		goto err;
@@ -157,6 +159,9 @@ static int mdss_pll_clock_register(struct platform_device *pdev, 
	case MDSS_DP_PLL_10NM:

		rc = dp_pll_clock_register_10nm(pdev, pll_res);

		break;

	case MDSS_DSI_PLL_7NM:

		rc = dsi_pll_clock_register_7nm(pdev, pll_res);

		break;

	case MDSS_UNKNOWN_PLL:

	default:

		rc = -EINVAL;
@@ -385,6 +390,7 @@ static int mdss_pll_remove(struct platform_device *pdev) 
static const struct of_device_id mdss_pll_dt_match[] = {

	{.compatible = "qcom,mdss_dsi_pll_10nm"},

	{.compatible = "qcom,mdss_dp_pll_10nm"},

	{.compatible = "qcom,mdss_dsi_pll_7nm"},

	{}

};