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Commit 386177da authored by Eugeniy Paltsev's avatar Eugeniy Paltsev Committed by Vineet Gupta
Browse files

ARC: add SMP_CACHE_BYTES value validate 



Check that SMP_CACHE_BYTES (and hence ARCH_DMA_MINALIGN) is larger
or equal to any cache line length by comparing it with values
previously read from ARC cache BCR registers.

Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent eb277739

arch/arc/mm/cache.c

+10 −0
Original line number Diff line number Diff line
@@ -1246,6 +1246,16 @@ void __init arc_cache_init_master(void) 
		}

	}



	/*

	 * Check that SMP_CACHE_BYTES (and hence ARCH_DMA_MINALIGN) is larger

	 * or equal to any cache line length.

	 */

	BUILD_BUG_ON_MSG(L1_CACHE_BYTES > SMP_CACHE_BYTES,

			 "SMP_CACHE_BYTES must be >= any cache line length");

	if (is_isa_arcv2() && (l2_line_sz > SMP_CACHE_BYTES))

		panic("L2 Cache line [%d] > kernel Config [%d]\n",

		      l2_line_sz, SMP_CACHE_BYTES);



	/* Note that SLC disable not formally supported till HS 3.0 */

	if (is_isa_arcv2() && l2_line_sz && !slc_enable)

		arc_slc_disable();