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Commit 37857c01 authored by Yuchao Ma's avatar Yuchao Ma Committed by Gerrit - the friendly Code Review server
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drm/msm/sde: Add support for AD4 BL scale calculate 



The change adds support for calculating ad bl scale. Scale should be
calculated by formula:(ad_output_bl * max_ad_bl_scale) / ad_input_bl.

Change-Id: I05b7a2e5676d81c212b67b45497cd472ee7ff0f3
Signed-off-by: default avatarYuchao Ma <yuchaom@codeaurora.org>
parent 7f4f3418

drivers/gpu/drm/msm/sde/sde_ad4.h

+5 −3
Original line number Diff line number Diff line
@@ -58,7 +58,7 @@ enum ad_property { 
 * enum ad_intr_resp_property - ad4 interrupt response enum

 */

enum ad_intr_resp_property {

	AD4_BACKLIGHT,

	AD4_IN_OUT_BACKLIGHT,

	AD4_RESPMAX,

};
@@ -92,8 +92,10 @@ void sde_setup_dspp_ad4(struct sde_hw_dspp *dspp, void *cfg); 
 * sde_read_intr_resp_ad4 - api to get ad4 interrupt status for event

 * @dspp: pointer to dspp object

 * @event: event for which response is needed

 * @resp: value of event requested

 * @resp_in: read ad4 input value of event requested

 * @resp_out: read ad4 output value of event requested

 */

void sde_read_intr_resp_ad4(struct sde_hw_dspp *dspp, u32 event, u32 *resp);

void sde_read_intr_resp_ad4(struct sde_hw_dspp *dspp, u32 event,

			u32 *resp_in, u32 *resp_out);



#endif /* _SDE_AD4_H_ */

drivers/gpu/drm/msm/sde/sde_color_processing.c

+11 −3
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
#include "sde_ad4.h"

#include "sde_hw_interrupts.h"

#include "sde_core_irq.h"

#include "dsi_panel.h"



struct sde_cp_node {

	u32 property_id;
@@ -1575,7 +1576,8 @@ static void sde_cp_ad_interrupt_cb(void *arg, int irq_idx) 


static void sde_cp_notify_ad_event(struct drm_crtc *crtc_drm, void *arg)

{

	uint32_t bl = 0;

	uint32_t input_bl = 0, output_bl = 0;

	uint32_t scale = MAX_AD_BL_SCALE_LEVEL;

	struct sde_hw_mixer *hw_lm = NULL;

	struct sde_hw_dspp *hw_dspp = NULL;

	u32 num_mixers;
@@ -1598,11 +1600,17 @@ static void sde_cp_notify_ad_event(struct drm_crtc *crtc_drm, void *arg) 
	if (!hw_dspp)

		return;



	hw_dspp->ops.ad_read_intr_resp(hw_dspp, AD4_BACKLIGHT, &bl);

	hw_dspp->ops.ad_read_intr_resp(hw_dspp, AD4_IN_OUT_BACKLIGHT,

			&input_bl, &output_bl);



	if (!input_bl || input_bl < output_bl)

		return;



	scale = (output_bl * MAX_AD_BL_SCALE_LEVEL) / input_bl;

	event.length = sizeof(u32);

	event.type = DRM_EVENT_AD_BACKLIGHT;

	msm_mode_object_event_notify(&crtc_drm->base, crtc_drm->dev,

			&event, (u8 *)&bl);

			&event, (u8 *)&scale);

}



int sde_cp_ad_interrupt(struct drm_crtc *crtc_drm, bool en,

drivers/gpu/drm/msm/sde/sde_hw_ad4.c

+9 −5
Original line number Diff line number Diff line
@@ -1248,16 +1248,20 @@ static int ad4_backlight_setup_ipcr(struct sde_hw_dspp *dspp, 
	return 0;

}



void sde_read_intr_resp_ad4(struct sde_hw_dspp *dspp, u32 event, u32 *resp)

void sde_read_intr_resp_ad4(struct sde_hw_dspp *dspp, u32 event,

		u32 *resp_in, u32 *resp_out)

{

	if (!dspp || !resp) {

		DRM_ERROR("invalid params dspp %pK resp %pK\n", dspp, resp);

	if (!dspp || !resp_in || !resp_out) {

		DRM_ERROR("invalid params dspp %pK resp_in %pK resp_out %pK\n",

				dspp, resp_in, resp_out);

		return;

	}



	switch (event) {

	case AD4_BACKLIGHT:

		*resp = SDE_REG_READ(&dspp->hw,

	case AD4_IN_OUT_BACKLIGHT:

		*resp_in = SDE_REG_READ(&dspp->hw,

				dspp->cap->sblk->ad.base + 0x2c);

		*resp_out = SDE_REG_READ(&dspp->hw,

				dspp->cap->sblk->ad.base + 0x48);

		break;

	default:

drivers/gpu/drm/msm/sde/sde_hw_dspp.h

+3 −2
Original line number Diff line number Diff line
@@ -159,10 +159,11 @@ struct sde_hw_dspp_ops { 
	/**

	 * ad_read_intr_resp - function to get interrupt response for ad

	 * @event: Event for which response needs to be read

	 * @resp: Pointer to u32 where response value is dumped.

	 * @resp_in: Pointer to u32 where resp ad4 input value is dumped.

	 * @resp_out: Pointer to u32 where resp ad4 output value is dumped.

	 */

	void (*ad_read_intr_resp)(struct sde_hw_dspp *ctx, u32 event,

			u32 *resp);

			u32 *resp_in, u32 *resp_out);



};