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Commit 3737f09a authored by Yuan Zhao's avatar Yuan Zhao Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add FHD panel support for QRD SM8150 



This panel DDIC also support FHD+ scaler to WQHD, so
add the support configurate for QRD device.

Change-Id: Ie139cc0ee193c941a4043d4ae676f7f363d4333f
Signed-off-by: default avatarYuan Zhao <yzhao@codeaurora.org>
parent 9ebffb8d

arch/arm64/boot/dts/qcom/dsi-panel-sw43404-amoled-dsc-fhd-plus-cmd.dtsi

0 → 100644
+106 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



&mdss_mdp {

	dsi_sw43404_amoled_fhd_plus_cmd: qcom,mdss_dsi_sw43404_fhd_plus_cmd {

		qcom,mdss-dsi-panel-name =

		  "sw43404 amoled boe fhd+ panel with DSC";

		qcom,mdss-dsi-panel-type = "dsi_cmd_mode";

		qcom,mdss-dsi-virtual-channel-id = <0>;

		qcom,mdss-dsi-stream = <0>;

		qcom,mdss-dsi-bpp = <24>;

		qcom,mdss-dsi-color-order = "rgb_swap_rgb";

		qcom,mdss-dsi-underflow-color = <0xff>;

		qcom,mdss-dsi-border-color = <0>;



		qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";

		qcom,mdss-dsi-lane-map = "lane_map_0123";

		qcom,mdss-dsi-bllp-eof-power-mode;

		qcom,mdss-dsi-bllp-power-mode;

		qcom,mdss-dsi-lane-0-state;

		qcom,mdss-dsi-lane-1-state;

		qcom,mdss-dsi-lane-2-state;

		qcom,mdss-dsi-lane-3-state;

		qcom,mdss-dsi-dma-trigger = "trigger_sw";

		qcom,mdss-dsi-mdp-trigger = "none";

		qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;

		qcom,mdss-dsi-bl-max-level = <1023>;

		qcom,mdss-dsi-te-pin-select = <1>;

		qcom,mdss-dsi-wr-mem-start = <0x2c>;

		qcom,mdss-dsi-wr-mem-continue = <0x3c>;

		qcom,mdss-dsi-te-dcs-command = <1>;

		qcom,mdss-dsi-te-check-enable;

		qcom,mdss-dsi-te-using-te-pin;

		qcom,mdss-pan-physical-width-dimension = <68>;

		qcom,mdss-pan-physical-height-dimension = <138>;



		qcom,mdss-dsi-display-timings {

			timing@0{

				qcom,mdss-dsi-panel-framerate = <60>;

				qcom,mdss-dsi-panel-width = <1080>;

				qcom,mdss-dsi-panel-height = <2160>;

				qcom,mdss-dsi-h-front-porch = <160>;

				qcom,mdss-dsi-h-back-porch = <72>;

				qcom,mdss-dsi-h-pulse-width = <16>;

				qcom,mdss-dsi-h-sync-skew = <0>;

				qcom,mdss-dsi-h-sync-pulse = <0>;

				qcom,mdss-dsi-v-back-porch = <8>;

				qcom,mdss-dsi-v-front-porch = <8>;

				qcom,mdss-dsi-v-pulse-width = <1>;

				qcom,mdss-dsi-h-left-border = <0>;

				qcom,mdss-dsi-h-right-border = <0>;

				qcom,mdss-dsi-v-top-border = <0>;

				qcom,mdss-dsi-v-bottom-border = <0>;

				qcom,mdss-dsi-panel-jitter = <0x1 0x1>;

				qcom,mdss-dsi-on-command = [

				  39 01 00 00 00 00 03 b0 a5 00

				  07 01 00 00 00 00 02 01 00

				  0a 01 00 00 00 00 80 11 00 00 89 30 80

				     08 70 04 38 02 1c 02 1c 02 1c 02 00

				     02 0e 00 20 34 29 00 07 00 0C 00 2e

				     00 31 18 00 10 F0 03 0C 20 00 06 0B

				     0B 33 0E 1C 2A 38 46 54 62 69 70 77

				     79 7B 7D 7E 01 02 01 00 09 40 09 BE

				     19 FC 19 FA 19 F8 1A 38 1A 78 1A B6

				     2A F6 2B 34 2B 74 3B 74 6B F4 00 00

				     00 00 00 00 00 00 00 00 00 00 00 00

				     00 00 00 00 00 00 00 00 00 00 00 00

				     00 00 00 00 00 00 00 00 00 00 00 00

				     00 00

				  39 01 00 00 00 00 03 b0 a5 00

				  15 01 00 00 00 00 02 5e 10

				  39 01 00 00 00 00 06 b9 bf 11 40 00 30

				  39 01 00 00 00 00 09 F8 00 08 10 08 2D

					   00 00 2D

				  15 01 00 00 00 00 02 55 0c

				  05 01 00 00 1e 00 02 11 00

				  15 01 00 00 78 00 02 3d 01

				  39 01 00 00 00 00 03 b0 a5 00

				  05 01 00 00 78 00 02 35 00

				  05 01 00 00 3c 00 02 29 00

				];

				qcom,mdss-dsi-off-command = [

					05 01 00 00 14 00 02 28 00

					05 01 00 00 78 00 02 10 00];

				qcom,mdss-dsi-on-command-state = "dsi_lp_mode";

				qcom,mdss-dsi-off-command-state = "dsi_hs_mode";

				qcom,compression-mode = "dsc";

				qcom,mdss-dsc-slice-height = <540>;

				qcom,mdss-dsc-slice-width = <540>;

				qcom,mdss-dsc-slice-per-pkt = <1>;

				qcom,mdss-dsc-bit-per-component = <8>;

				qcom,mdss-dsc-bit-per-pixel = <8>;

				qcom,mdss-dsc-block-prediction-enable;

			};

		};

	};

};

arch/arm64/boot/dts/qcom/sm8150-qrd.dtsi

+12 −0
Original line number Diff line number Diff line
@@ -191,6 +191,18 @@ 
	qcom,platform-reset-gpio = <&tlmm 6 0>;

};



&dsi_sw43404_amoled_fhd_plus_cmd {

	qcom,panel-supply-entries = <&dsi_panel_pwr_supply_vdd_no_labibb>;

	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";

	qcom,mdss-dsi-bl-min-level = <1>;

	qcom,mdss-dsi-bl-max-level = <4095>;

	qcom,mdss-brightness-max-level = <1023>;

	qcom,mdss-dsi-mode-sel-gpio-state = "single_port";

	qcom,panel-mode-gpio = <&tlmm 7 0>;

	qcom,platform-te-gpio = <&tlmm 8 0>;

	qcom,platform-reset-gpio = <&tlmm 6 0>;

};



&dsi_sw43404_amoled_cmd_display {

	qcom,dsi-display-active;

};

arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi

+25 −1
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@ 
#include "dsi-panel-s6e3ha3-amoled-dualmipi-wqhd-cmd.dtsi"

#include "dsi-panel-sw43404-amoled-dsc-wqhd-cmd.dtsi"

#include "dsi-panel-sw43404-amoled-dsc-wqhd-video.dtsi"

#include "dsi-panel-sw43404-amoled-dsc-fhd-plus-cmd.dtsi"

#include <dt-bindings/clock/mdss-10nm-pll-clk.h>



&tlmm {
@@ -333,6 +334,17 @@ 
		qcom,dsi-panel = <&dsi_sw43404_amoled_video>;

	};



	dsi_sw43404_amoled_fhd_plus_cmd_display: qcom,dsi-display@18 {

		label = "dsi_sw43404_amoled_fhd_plus_cmd_display";

		qcom,display-type = "primary";



		qcom,dsi-ctrl-num = <0>;

		qcom,dsi-phy-num = <0>;

		qcom,dsi-select-clocks = "src_byte_clk0", "src_pixel_clk0";



		qcom,dsi-panel = <&dsi_sw43404_amoled_fhd_plus_cmd>;

	};



	sde_dsi: qcom,dsi-display {

		compatible = "qcom,dsi-display";
@@ -375,7 +387,8 @@ 
			&dsi_sw43404_amoled_cmd_display

			&dsi_nt35695b_truly_fhd_cmd_display

			&dsi_nt35695b_truly_fhd_video_display

			&dsi_sw43404_amoled_video_display>;

			&dsi_sw43404_amoled_video_display

			&dsi_sw43404_amoled_fhd_plus_cmd_display>;

	};



	sde_wb: qcom,wb-display@0 {
@@ -676,6 +689,17 @@ 
	};

};



&dsi_sw43404_amoled_fhd_plus_cmd {

	qcom,mdss-dsi-display-timings {

		timing@0 {

			qcom,mdss-dsi-panel-phy-timings = [00 12 04 04 1e 1e 04

				05 02 03 04 00 11 14];

			qcom,display-topology = <2 2 1>;

			qcom,default-topology-index = <0>;

		};

	};

};



&dsi_sw43404_amoled_video {

	qcom,mdss-dsi-display-timings {

		timing@0 {