x86/mm/pat: Extend set_page_memtype() to support Write-Through type (35a5a104) · Commits · e / devices / android_kernel_xiaomi_nabu

arch/x86/mm/pat.c

+29 −30

Original line number	Original line	Diff line number	Diff line
	@@ -70,18 +70,22 @@ __setup("debugpat", pat_debug_setup);

	#ifdef CONFIG_X86_PAT		#ifdef CONFIG_X86_PAT
	/*		/*
	* X86 PAT uses page flags WC and Uncached together to keep track of		* X86 PAT uses page flags arch_1 and uncached together to keep track of
	* memory type of pages that have backing page struct. X86 PAT supports 3		* memory type of pages that have backing page struct.
	* different memory types, _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC and		*
	* _PAGE_CACHE_MODE_UC_MINUS and fourth state where page's memory type has not		* X86 PAT supports 4 different memory types:
	* been changed from its default (value of -1 used to denote this).		* - _PAGE_CACHE_MODE_WB
	* Note we do not support _PAGE_CACHE_MODE_UC here.		* - _PAGE_CACHE_MODE_WC
			* - _PAGE_CACHE_MODE_UC_MINUS
			* - _PAGE_CACHE_MODE_WT
			*
			* _PAGE_CACHE_MODE_WB is the default type.
	*/		*/

	#define _PGMT_DEFAULT 0		#define _PGMT_WB 0
	#define _PGMT_WC (1UL << PG_arch_1)		#define _PGMT_WC (1UL << PG_arch_1)
	#define _PGMT_UC_MINUS (1UL << PG_uncached)		#define _PGMT_UC_MINUS (1UL << PG_uncached)
	#define _PGMT_WB (1UL << PG_uncached \| 1UL << PG_arch_1)		#define _PGMT_WT (1UL << PG_uncached \| 1UL << PG_arch_1)
	#define _PGMT_MASK (1UL << PG_uncached \| 1UL << PG_arch_1)		#define _PGMT_MASK (1UL << PG_uncached \| 1UL << PG_arch_1)
	#define _PGMT_CLEAR_MASK (~_PGMT_MASK)		#define _PGMT_CLEAR_MASK (~_PGMT_MASK)

	@@ -89,14 +93,14 @@ static inline enum page_cache_mode get_page_memtype(struct page *pg)
	{		{
	unsigned long pg_flags = pg->flags & _PGMT_MASK;		unsigned long pg_flags = pg->flags & _PGMT_MASK;

	if (pg_flags == _PGMT_DEFAULT)		if (pg_flags == _PGMT_WB)
	return -1;		return _PAGE_CACHE_MODE_WB;
	else if (pg_flags == _PGMT_WC)		else if (pg_flags == _PGMT_WC)
	return _PAGE_CACHE_MODE_WC;		return _PAGE_CACHE_MODE_WC;
	else if (pg_flags == _PGMT_UC_MINUS)		else if (pg_flags == _PGMT_UC_MINUS)
	return _PAGE_CACHE_MODE_UC_MINUS;		return _PAGE_CACHE_MODE_UC_MINUS;
	else		else
	return _PAGE_CACHE_MODE_WB;		return _PAGE_CACHE_MODE_WT;
	}		}

	static inline void set_page_memtype(struct page *pg,		static inline void set_page_memtype(struct page *pg,
	@@ -113,11 +117,12 @@ static inline void set_page_memtype(struct page *pg,
	case _PAGE_CACHE_MODE_UC_MINUS:		case _PAGE_CACHE_MODE_UC_MINUS:
	memtype_flags = _PGMT_UC_MINUS;		memtype_flags = _PGMT_UC_MINUS;
	break;		break;
	case _PAGE_CACHE_MODE_WB:		case _PAGE_CACHE_MODE_WT:
	memtype_flags = _PGMT_WB;		memtype_flags = _PGMT_WT;
	break;		break;
			case _PAGE_CACHE_MODE_WB:
	default:		default:
	memtype_flags = _PGMT_DEFAULT;		memtype_flags = _PGMT_WB;
	break;		break;
	}		}

	@@ -401,8 +406,10 @@ static int pat_pagerange_is_ram(resource_size_t start, resource_size_t end)

	/*		/*
	* For RAM pages, we use page flags to mark the pages with appropriate type.		* For RAM pages, we use page flags to mark the pages with appropriate type.
	* The page flags are limited to three types, WB, WC and UC-. WT and WP requests		* The page flags are limited to four types, WB (default), WC, WT and UC-.
	* fail with -EINVAL, and UC gets redirected to UC-.		* WP request fails with -EINVAL, and UC gets redirected to UC-. Setting
			* a new memory type is only allowed for a page mapped with the default WB
			* type.
	*		*
	* Here we do two passes:		* Here we do two passes:
	* - Find the memtype of all the pages in the range, look for any conflicts.		* - Find the memtype of all the pages in the range, look for any conflicts.
	@@ -415,8 +422,7 @@ static int reserve_ram_pages_type(u64 start, u64 end,
	struct page *page;		struct page *page;
	u64 pfn;		u64 pfn;

	if ((req_type == _PAGE_CACHE_MODE_WT) \|\|		if (req_type == _PAGE_CACHE_MODE_WP) {
	(req_type == _PAGE_CACHE_MODE_WP)) {
	if (new_type)		if (new_type)
	*new_type = _PAGE_CACHE_MODE_UC_MINUS;		*new_type = _PAGE_CACHE_MODE_UC_MINUS;
	return -EINVAL;		return -EINVAL;
	@@ -433,7 +439,7 @@ static int reserve_ram_pages_type(u64 start, u64 end,

	page = pfn_to_page(pfn);		page = pfn_to_page(pfn);
	type = get_page_memtype(page);		type = get_page_memtype(page);
	if (type != -1) {		if (type != _PAGE_CACHE_MODE_WB) {
	pr_info("x86/PAT: reserve_ram_pages_type failed [mem %#010Lx-%#010Lx], track 0x%x, req 0x%x\n",		pr_info("x86/PAT: reserve_ram_pages_type failed [mem %#010Lx-%#010Lx], track 0x%x, req 0x%x\n",
	start, end - 1, type, req_type);		start, end - 1, type, req_type);
	if (new_type)		if (new_type)
	@@ -460,7 +466,7 @@ static int free_ram_pages_type(u64 start, u64 end)

	for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) {		for (pfn = (start >> PAGE_SHIFT); pfn < (end >> PAGE_SHIFT); ++pfn) {
	page = pfn_to_page(pfn);		page = pfn_to_page(pfn);
	set_page_memtype(page, -1);		set_page_memtype(page, _PAGE_CACHE_MODE_WB);
	}		}
	return 0;		return 0;
	}		}
	@@ -601,7 +607,7 @@ int free_memtype(u64 start, u64 end)
	* Only to be called when PAT is enabled		* Only to be called when PAT is enabled
	*		*
	* Returns _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC, _PAGE_CACHE_MODE_UC_MINUS		* Returns _PAGE_CACHE_MODE_WB, _PAGE_CACHE_MODE_WC, _PAGE_CACHE_MODE_UC_MINUS
	* or _PAGE_CACHE_MODE_UC		* or _PAGE_CACHE_MODE_WT.
	*/		*/
	static enum page_cache_mode lookup_memtype(u64 paddr)		static enum page_cache_mode lookup_memtype(u64 paddr)
	{		{
	@@ -613,16 +619,9 @@ static enum page_cache_mode lookup_memtype(u64 paddr)

	if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) {		if (pat_pagerange_is_ram(paddr, paddr + PAGE_SIZE)) {
	struct page *page;		struct page *page;
	page = pfn_to_page(paddr >> PAGE_SHIFT);
	rettype = get_page_memtype(page);
	/*
	* -1 from get_page_memtype() implies RAM page is in its
	* default state and not reserved, and hence of type WB
	*/
	if (rettype == -1)
	rettype = _PAGE_CACHE_MODE_WB;

	return rettype;		page = pfn_to_page(paddr >> PAGE_SHIFT);
			return get_page_memtype(page);
	}		}

	spin_lock(&memtype_lock);		spin_lock(&memtype_lock);