clk: qcom: gcc-qcs405: Add support for vdd_sr_pll regulator
SR PLL is connected to LDO3 so GPLL6 should vote for this
rail when there is a frequency request. Add support for
voting for this rail.
Change-Id: Icb8c79b5668ca9571002092746824a55cb650a33
Signed-off-by:
Taniya Das <tdas@codeaurora.org>
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