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Commit 31e6d30b authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add sensor clock controller device for SM8150"

parents 97e9b6a9 62799be2
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+15 −0
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Qualcomm Technologies, Inc. Sensor Clock Controller Bindings

Required properties:
- compatible: shall contain "qcom,scc-sm8150" or "qcom,scc-sm8150-v2".
- reg: shall contain base register location and length.
- vdd_scc_cx-supply: the logic rail supply.
- #clock-cells: shall contain 1.

Example:
	qcom,scc@2b10000 {
		compatible = "qcom,scc-sm8150";
		reg = <0x2b10000 0x30000>;
		vdd_scc_cx-supply = <&VDD_CX_LEVEL>;
		#clock-cells = <1>;
	};
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@@ -179,6 +179,11 @@
	vdda-phy-supply = <&pm8150_2_l18>;
};

&clock_scc {
	vdd_scc_cx-supply = <&VDD_CX_LEVEL>;
	status = "ok";
};

&thermal_zones {
	aoss0-lowf {
		cooling-maps {
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@@ -75,6 +75,11 @@
&clock_npucc {
	compatible = "qcom,npucc-sm8150-v2", "syscon";
};

&clock_scc {
	compatible = "qcom,scc-sm8150-v2";
};

#include "msm-arm-smmu-sm8150-v2.dtsi"

&pcie0 {
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@@ -15,6 +15,7 @@
#include <dt-bindings/clock/qcom,camcc-sm8150.h>
#include <dt-bindings/clock/qcom,dispcc-sm8150.h>
#include <dt-bindings/clock/qcom,gpucc-sm8150.h>
#include <dt-bindings/clock/qcom,scc-sm8150.h>
#include <dt-bindings/clock/qcom,videocc-sm8150.h>
#include <dt-bindings/clock/qcom,cpucc-sm8150.h>
#include <dt-bindings/clock/qcom,npucc-sm8150.h>
@@ -1463,6 +1464,14 @@
		#reset-cells = <1>;
	};

	clock_scc: qcom,scc@2b10000 {
		compatible = "qcom,scc-sm8150";
		reg = <0x2b10000 0x30000>;
		vdd_scc_cx-supply = <&pm8150_l8_level>;
		#clock-cells = <1>;
		status = "disabled";
	};

	cpucc_debug: syscon@182a0018 {
		compatible = "syscon";
		reg = <0x182a0018 0x4>;
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@@ -486,6 +486,7 @@ CONFIG_SPMI_PMIC_CLKDIV=y
CONFIG_MSM_CLK_AOP_QMP=y
CONFIG_MSM_GCC_SM8150=y
CONFIG_MSM_NPUCC_SM8150=y
CONFIG_MSM_SCC_SM8150=y
CONFIG_MSM_VIDEOCC_SM8150=y
CONFIG_MSM_CAMCC_SM8150=y
CONFIG_CLOCK_CPU_OSM=y
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