Merge "defconfig: qcs405: Enable CONFIG_NEON support for qcs405" (309c887b) · Commits · e / devices / android_kernel_xiaomi_nabu

arch/arm/configs/qcs405-perf_defconfig

+2 −0

Original line number	Diff line number	Diff line
		@@ -40,6 +40,8 @@ CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y
		CONFIG_CPU_IDLE=y
		CONFIG_ARM_CPUIDLE=y
		CONFIG_VFP=y
		CONFIG_NEON=y
		CONFIG_KERNEL_MODE_NEON=y
		# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
		CONFIG_PM_AUTOSLEEP=y
		CONFIG_PM_WAKELOCKS=y

arch/arm/configs/qcs405_defconfig

+2 −0

Original line number	Diff line number	Diff line
		@@ -44,6 +44,8 @@ CONFIG_BUILD_ARM_APPENDED_DTB_IMAGE=y
		CONFIG_CPU_IDLE=y
		CONFIG_ARM_CPUIDLE=y
		CONFIG_VFP=y
		CONFIG_NEON=y
		CONFIG_KERNEL_MODE_NEON=y
		# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
		CONFIG_PM_AUTOSLEEP=y
		CONFIG_PM_WAKELOCKS=y

arch/arm/include/asm/cacheflush.h

+21 −0

Original line number	Diff line number	Diff line
		@@ -94,6 +94,21 @@
		* DMA Cache Coherency
		* ===================
		*
		* dma_inv_range(start, end)
		*
		* Invalidate (discard) the specified virtual address range.
		* May not write back any entries. If 'start' or 'end'
		* are not cache line aligned, those lines must be written
		* back.
		* - start - virtual start address
		* - end - virtual end address
		*
		* dma_clean_range(start, end)
		*
		* Clean (write back) the specified virtual address range.
		* - start - virtual start address
		* - end - virtual end address
		*
		* dma_flush_range(start, end)
		*
		* Clean and invalidate the specified virtual address range.
		@@ -115,6 +130,8 @@ struct cpu_cache_fns {
		void (dma_map_area)(const void , size_t, int);
		void (dma_unmap_area)(const void , size_t, int);

		void (dma_inv_range)(const void , const void *);
		void (dma_clean_range)(const void , const void *);
		void (dma_flush_range)(const void , const void *);
		} __no_randomize_layout;

		@@ -140,6 +157,8 @@ extern struct cpu_cache_fns cpu_cache;
		* is visible to DMA, or data written by DMA to system memory is
		* visible to the CPU.
		*/
		#define dmac_inv_range cpu_cache.dma_inv_range
		#define dmac_clean_range cpu_cache.dma_clean_range
		#define dmac_flush_range cpu_cache.dma_flush_range

		#else
		@@ -159,6 +178,8 @@ extern void __cpuc_flush_dcache_area(void *, size_t);
		* is visible to DMA, or data written by DMA to system memory is
		* visible to the CPU.
		*/
		extern void dmac_inv_range(const void start, const void end);
		extern void dmac_clean_range(const void start, const void end);
		extern void dmac_flush_range(const void , const void );

		#endif

arch/arm/include/asm/glue-cache.h

+2 −0

Original line number	Diff line number	Diff line
		@@ -155,6 +155,8 @@ static inline void nop_dma_unmap_area(const void *s, size_t l, int f) { }
		#define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)

		#define dmac_flush_range __glue(_CACHE,_dma_flush_range)
		#define dmac_inv_range __glue(_CACHE, _dma_inv_range)
		#define dmac_clean_range __glue(_CACHE, _dma_clean_range)
		#endif

		#endif

arch/arm/kernel/io.c

+59 −13

Original line number	Diff line number	Diff line
		@@ -4,6 +4,8 @@
		#include <linux/io.h>
		#include <linux/spinlock.h>

		#define IO_CHECK_ALIGN(v, a) ((((unsigned long)(v)) & ((a) - 1)) == 0)

		static DEFINE_RAW_SPINLOCK(__io_lock);

		/*
		@@ -40,46 +42,90 @@ EXPORT_SYMBOL(atomic_io_modify);

		/*
		* Copy data from IO memory space to "real" memory space.
		* This needs to be optimized.
		*/
		void _memcpy_fromio(void to, const volatile void __iomem from, size_t count)
		{
		unsigned char *t = to;
		while (count) {
		while (count && (!IO_CHECK_ALIGN(from, 8) \|\| !IO_CHECK_ALIGN(to, 8))) {
		(u8 )to = readb_relaxed_no_log(from);
		from++;
		to++;
		count--;
		*t = readb(from);
		t++;
		}

		while (count >= 8) {
		(u64 )to = readq_relaxed_no_log(from);
		from += 8;
		to += 8;
		count -= 8;
		}

		while (count) {
		(u8 )to = readb_relaxed_no_log(from);
		from++;
		to++;
		count--;
		}
		}
		EXPORT_SYMBOL(_memcpy_fromio);

		/*
		* Copy data from "real" memory space to IO memory space.
		* This needs to be optimized.
		*/
		void _memcpy_toio(volatile void __iomem to, const void from, size_t count)
		{
		const unsigned char *f = from;
		void p = (void __force )to;

		while (count && (!IO_CHECK_ALIGN(p, 8) \|\| !IO_CHECK_ALIGN(from, 8))) {
		writeb_relaxed_no_log((volatile u8 )from, p);
		from++;
		p++;
		count--;
		}

		while (count >= 8) {
		writeq_relaxed_no_log((volatile u64 )from, p);
		from += 8;
		p += 8;
		count -= 8;
		}

		while (count) {
		writeb_relaxed_no_log((volatile u8 )from, p);
		from++;
		p++;
		count--;
		writeb(*f, to);
		f++;
		to++;
		}
		}
		EXPORT_SYMBOL(_memcpy_toio);

		/*
		* "memset" on IO memory space.
		* This needs to be optimized.
		*/
		void _memset_io(volatile void __iomem *dst, int c, size_t count)
		{
		void p = (void __force )dst;
		u64 qc = c;

		qc \|= qc << 8;
		qc \|= qc << 16;
		qc \|= qc << 32;

		while (count && !IO_CHECK_ALIGN(p, 8)) {
		writeb_relaxed_no_log(c, p);
		p++;
		count--;
		}

		while (count >= 8) {
		writeq_relaxed_no_log(qc, p);
		p += 8;
		count -= 8;
		}

		while (count) {
		writeb_relaxed_no_log(c, p);
		p++;
		count--;
		writeb(c, dst);
		dst++;
		}
		}
		EXPORT_SYMBOL(_memset_io);