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Commit 2e0a5013 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: debugcc-sm8150: Remove measurement support for unused clocks"

parents 0b7694b7 8cb7ad28
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+0 −87
Original line number Diff line number Diff line
@@ -53,7 +53,6 @@ static const char *const debug_mux_parent_names[] = {
	"cam_cc_csiphy3_clk",
	"cam_cc_fd_core_clk",
	"cam_cc_fd_core_uar_clk",
	"cam_cc_gdsc_clk",
	"cam_cc_icp_ahb_clk",
	"cam_cc_icp_clk",
	"cam_cc_ife_0_axi_clk",
@@ -86,8 +85,6 @@ static const char *const debug_mux_parent_names[] = {
	"cam_cc_mclk1_clk",
	"cam_cc_mclk2_clk",
	"cam_cc_mclk3_clk",
	"cam_cc_qdss_debug_clk",
	"cam_cc_qdss_debug_xo_clk",
	"disp_cc_mdss_ahb_clk",
	"disp_cc_mdss_byte0_clk",
	"disp_cc_mdss_byte0_intf_clk",
@@ -130,7 +127,6 @@ static const char *const debug_mux_parent_names[] = {
	"gcc_aggre_ufs_phy_axi_clk",
	"gcc_aggre_usb3_prim_axi_clk",
	"gcc_aggre_usb3_sec_axi_clk",
	"gcc_boot_rom_ahb_clk",
	"gcc_camera_ahb_clk",
	"gcc_camera_hf_axi_clk",
	"gcc_camera_sf_axi_clk",
@@ -141,8 +137,6 @@ static const char *const debug_mux_parent_names[] = {
	"gcc_cfg_noc_usb3_prim_axi_clk",
	"gcc_cfg_noc_usb3_sec_axi_clk",
	"gcc_cpuss_ahb_clk",
	"gcc_cpuss_dvm_bus_clk",
	"gcc_cpuss_gnoc_clk",
	"gcc_cpuss_rbcpr_clk",
	"gcc_ddrss_gpu_axi_clk",
	"gcc_disp_ahb_clk",
@@ -186,11 +180,6 @@ static const char *const debug_mux_parent_names[] = {
	"gcc_pdm_ahb_clk",
	"gcc_pdm_xo4_clk",
	"gcc_prng_ahb_clk",
	"gcc_qmip_camera_nrt_ahb_clk",
	"gcc_qmip_camera_rt_ahb_clk",
	"gcc_qmip_disp_ahb_clk",
	"gcc_qmip_video_cvp_ahb_clk",
	"gcc_qmip_video_vcodec_ahb_clk",
	"gcc_qspi_cnoc_periph_ahb_clk",
	"gcc_qspi_core_clk",
	"gcc_qupv3_wrap0_core_2x_clk",
@@ -219,19 +208,12 @@ static const char *const debug_mux_parent_names[] = {
	"gcc_qupv3_wrap2_s3_clk",
	"gcc_qupv3_wrap2_s4_clk",
	"gcc_qupv3_wrap2_s5_clk",
	"gcc_qupv3_wrap_0_m_ahb_clk",
	"gcc_qupv3_wrap_0_s_ahb_clk",
	"gcc_qupv3_wrap_1_m_ahb_clk",
	"gcc_qupv3_wrap_1_s_ahb_clk",
	"gcc_qupv3_wrap_2_m_ahb_clk",
	"gcc_qupv3_wrap_2_s_ahb_clk",
	"gcc_sdcc2_ahb_clk",
	"gcc_sdcc2_apps_clk",
	"gcc_sdcc4_ahb_clk",
	"gcc_sdcc4_apps_clk",
	"gcc_sys_noc_cpuss_ahb_clk",
	"gcc_tsif_ahb_clk",
	"gcc_tsif_inactivity_timers_clk",
	"gcc_tsif_ref_clk",
	"gcc_ufs_card_ahb_clk",
	"gcc_ufs_card_axi_clk",
@@ -251,10 +233,8 @@ static const char *const debug_mux_parent_names[] = {
	"gcc_ufs_phy_unipro_core_clk",
	"gcc_usb30_prim_master_clk",
	"gcc_usb30_prim_mock_utmi_clk",
	"gcc_usb30_prim_sleep_clk",
	"gcc_usb30_sec_master_clk",
	"gcc_usb30_sec_mock_utmi_clk",
	"gcc_usb30_sec_sleep_clk",
	"gcc_usb3_prim_phy_aux_clk",
	"gcc_usb3_prim_phy_com_aux_clk",
	"gcc_usb3_prim_phy_pipe_clk",
@@ -266,22 +246,16 @@ static const char *const debug_mux_parent_names[] = {
	"gcc_video_axi1_clk",
	"gcc_video_axic_clk",
	"gcc_video_xo_clk",
	"gpu_cc_acd_ahb_clk",
	"gpu_cc_acd_cxo_clk",
	"gpu_cc_ahb_clk",
	"gpu_cc_crc_ahb_clk",
	"gpu_cc_cx_apb_clk",
	"gpu_cc_cx_gmu_clk",
	"gpu_cc_cx_qdss_at_clk",
	"gpu_cc_cx_qdss_trig_clk",
	"gpu_cc_cx_qdss_tsctr_clk",
	"gpu_cc_cx_snoc_dvm_clk",
	"gpu_cc_cxo_aon_clk",
	"gpu_cc_cxo_clk",
	"gpu_cc_gx_gmu_clk",
	"gpu_cc_gx_qdss_tsctr_clk",
	"gpu_cc_gx_vsense_clk",
	"gpu_cc_sleep_clk",
	"measure_only_gpu_cc_cx_gfx3d_clk",
	"measure_only_gpu_cc_cx_gfx3d_slv_clk",
	"measure_only_gpu_cc_gx_gfx3d_clk",
@@ -297,10 +271,7 @@ static const char *const debug_mux_parent_names[] = {
	"npu_cc_npu_core_clk",
	"npu_cc_npu_core_cti_clk",
	"npu_cc_npu_cpc_clk",
	"npu_cc_npu_cpc_timer_clk",
	"npu_cc_perf_cnt_clk",
	"npu_cc_qtimer_core_clk",
	"npu_cc_sleep_clk",
	"npu_cc_xo_clk",
	"video_cc_iris_ahb_clk",
	"video_cc_mvs0_core_clk",
@@ -359,8 +330,6 @@ static struct clk_debug_mux gcc_debug_mux = {
			0x28, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 },
		{ "cam_cc_fd_core_uar_clk", 0x55, 1, CAM_CC,
			0x29, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 },
		{ "cam_cc_gdsc_clk", 0x55, 1, CAM_CC,
			0x3C, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 },
		{ "cam_cc_icp_ahb_clk", 0x55, 1, CAM_CC,
			0x37, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 },
		{ "cam_cc_icp_clk", 0x55, 1, CAM_CC,
@@ -425,10 +394,6 @@ static struct clk_debug_mux gcc_debug_mux = {
			0x3, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 },
		{ "cam_cc_mclk3_clk", 0x55, 1, CAM_CC,
			0x4, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 },
		{ "cam_cc_qdss_debug_clk", 0x55, 1, CAM_CC,
			0x3D, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 },
		{ "cam_cc_qdss_debug_xo_clk", 0x55, 1, CAM_CC,
			0x3E, 0xFF, 0, 0xF, 0, 4, 0xD000, 0xD004, 0xD008 },
		{ "disp_cc_mdss_ahb_clk", 0x56, 1, DISP_CC,
			0x2B, 0xFF, 0, 0x3, 0, 4, 0x7000, 0x5008, 0x500C },
		{ "disp_cc_mdss_byte0_clk", 0x56, 1, DISP_CC,
@@ -513,8 +478,6 @@ static struct clk_debug_mux gcc_debug_mux = {
			0x13E, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_aggre_usb3_sec_axi_clk", 0x13F, 1, GCC,
			0x13F, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_boot_rom_ahb_clk", 0xA0, 1, GCC,
			0xA0, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_camera_ahb_clk", 0x43, 1, GCC,
			0x43, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_camera_hf_axi_clk", 0x4D, 1, GCC,
@@ -535,10 +498,6 @@ static struct clk_debug_mux gcc_debug_mux = {
			0x23, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_cpuss_ahb_clk", 0xE0, 1, GCC,
			0xE0, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_cpuss_dvm_bus_clk", 0xE5, 1, GCC,
			0xE5, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_cpuss_gnoc_clk", 0xE1, 1, GCC,
			0xE1, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_cpuss_rbcpr_clk", 0xE2, 1, GCC,
			0xE2, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_ddrss_gpu_axi_clk", 0xC0, 1, GCC,
@@ -625,16 +584,6 @@ static struct clk_debug_mux gcc_debug_mux = {
			0x99, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_prng_ahb_clk", 0x9B, 1, GCC,
			0x9B, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qmip_camera_nrt_ahb_clk", 0x47, 1, GCC,
			0x47, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qmip_camera_rt_ahb_clk", 0x48, 1, GCC,
			0x48, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qmip_disp_ahb_clk", 0x49, 1, GCC,
			0x49, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qmip_video_cvp_ahb_clk", 0x45, 1, GCC,
			0x45, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qmip_video_vcodec_ahb_clk", 0x46, 1, GCC,
			0x46, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qspi_cnoc_periph_ahb_clk", 0x178, 1, GCC,
			0x178, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qspi_core_clk", 0x179, 1, GCC,
@@ -691,18 +640,6 @@ static struct clk_debug_mux gcc_debug_mux = {
			0x189, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qupv3_wrap2_s5_clk", 0x18A, 1, GCC,
			0x18A, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qupv3_wrap_0_m_ahb_clk", 0x82, 1, GCC,
			0x82, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qupv3_wrap_0_s_ahb_clk", 0x83, 1, GCC,
			0x83, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qupv3_wrap_1_m_ahb_clk", 0x8E, 1, GCC,
			0x8E, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qupv3_wrap_1_s_ahb_clk", 0x8F, 1, GCC,
			0x8F, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qupv3_wrap_2_m_ahb_clk", 0x181, 1, GCC,
			0x181, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_qupv3_wrap_2_s_ahb_clk", 0x182, 1, GCC,
			0x182, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_sdcc2_ahb_clk", 0x7F, 1, GCC,
			0x7F, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_sdcc2_apps_clk", 0x7E, 1, GCC,
@@ -715,8 +652,6 @@ static struct clk_debug_mux gcc_debug_mux = {
			0xC, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_tsif_ahb_clk", 0x9C, 1, GCC,
			0x9C, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_tsif_inactivity_timers_clk", 0x9E, 1, GCC,
			0x9E, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_tsif_ref_clk", 0x9D, 1, GCC,
			0x9D, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_ufs_card_ahb_clk", 0x107, 1, GCC,
@@ -755,14 +690,10 @@ static struct clk_debug_mux gcc_debug_mux = {
			0x6B, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_usb30_prim_mock_utmi_clk", 0x6D, 1, GCC,
			0x6D, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_usb30_prim_sleep_clk", 0x6C, 1, GCC,
			0x6C, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_usb30_sec_master_clk", 0x72, 1, GCC,
			0x72, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_usb30_sec_mock_utmi_clk", 0x74, 1, GCC,
			0x74, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_usb30_sec_sleep_clk", 0x73, 1, GCC,
			0x73, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_usb3_prim_phy_aux_clk", 0x6E, 1, GCC,
			0x6E, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_usb3_prim_phy_com_aux_clk", 0x6F, 1, GCC,
@@ -785,14 +716,8 @@ static struct clk_debug_mux gcc_debug_mux = {
			0x4C, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gcc_video_xo_clk", 0x51, 1, GCC,
			0x51, 0x3FF, 0, 0xF, 0, 1, 0x62000, 0x62004, 0x62008 },
		{ "gpu_cc_acd_ahb_clk", 0x162, 1, GPU_CC,
			0x20, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_acd_cxo_clk", 0x162, 1, GPU_CC,
			0x1F, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_ahb_clk", 0x162, 1, GPU_CC,
			0x10, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_crc_ahb_clk", 0x162, 1, GPU_CC,
			0x11, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_cx_apb_clk", 0x162, 1, GPU_CC,
			0x14, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_cx_gmu_clk", 0x162, 1, GPU_CC,
@@ -801,8 +726,6 @@ static struct clk_debug_mux gcc_debug_mux = {
			0x12, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_cx_qdss_trig_clk", 0x162, 1, GPU_CC,
			0x17, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_cx_qdss_tsctr_clk", 0x162, 1, GPU_CC,
			0x13, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_cx_snoc_dvm_clk", 0x162, 1, GPU_CC,
			0x15, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_cxo_aon_clk", 0x162, 1, GPU_CC,
@@ -811,12 +734,8 @@ static struct clk_debug_mux gcc_debug_mux = {
			0x19, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_gx_gmu_clk", 0x162, 1, GPU_CC,
			0xF, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_gx_qdss_tsctr_clk", 0x162, 1, GPU_CC,
			0xD, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_gx_vsense_clk", 0x162, 1, GPU_CC,
			0xC, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "gpu_cc_sleep_clk", 0x162, 1, GPU_CC,
			0x16, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "measure_only_gpu_cc_cx_gfx3d_clk", 0x162, 1, GPU_CC,
			0x1A, 0xFF, 0, 0x3, 0, 2, 0x1568, 0x10FC, 0x1100 },
		{ "measure_only_gpu_cc_cx_gfx3d_slv_clk", 0x162, 1, GPU_CC,
@@ -847,14 +766,8 @@ static struct clk_debug_mux gcc_debug_mux = {
			0xC, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 },
		{ "npu_cc_npu_cpc_clk", 0x180, 1, NPU_CC,
			0x3, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 },
		{ "npu_cc_npu_cpc_timer_clk", 0x180, 1, NPU_CC,
			0x5, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 },
		{ "npu_cc_perf_cnt_clk", 0x180, 1, NPU_CC,
			0x10, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 },
		{ "npu_cc_qtimer_core_clk", 0x180, 1, NPU_CC,
			0x6, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 },
		{ "npu_cc_sleep_clk", 0x180, 1, NPU_CC,
			0x7, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 },
		{ "npu_cc_xo_clk", 0x180, 1, NPU_CC,
			0x11, 0xFF, 0, 0x3, 0, 2, 0x4000, 0x3004, 0x3008 },
		{ "video_cc_iris_ahb_clk", 0x57, 1, VIDEO_CC,