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Commit 2db76d7c authored by Imre Deak's avatar Imre Deak Committed by Daniel Vetter
Browse files

lib/scatterlist: sg_page_iter: support sg lists w/o backing pages 



The i915 driver uses sg lists for memory without backing 'struct page'
pages, similarly to other IO memory regions, setting only the DMA
address for these. It does this, so that it can program the HW MMU
tables in a uniform way both for sg lists with and without backing pages.

Without a valid page pointer we can't call nth_page to get the current
page in __sg_page_iter_next, so add a helper that relevant users can
call separately. Also add a helper to get the DMA address of the current
page (idea from Daniel).

Convert all places in i915, to use the new API.

Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarDamien Lespiau <damien.lespiau@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 693db184

drivers/gpu/drm/drm_cache.c

+1 −1
Original line number Diff line number Diff line
@@ -109,7 +109,7 @@ drm_clflush_sg(struct sg_table *st) 


		mb();

		for_each_sg_page(st->sgl, &sg_iter, st->nents, 0)

			drm_clflush_page(sg_iter.page);

			drm_clflush_page(sg_page_iter_page(&sg_iter));

		mb();



		return;

drivers/gpu/drm/i915/i915_drv.h

+1 −1
Original line number Diff line number Diff line
@@ -1543,7 +1543,7 @@ static inline struct page *i915_gem_object_get_page(struct drm_i915_gem_object * 
	struct sg_page_iter sg_iter;



	for_each_sg_page(obj->pages->sgl, &sg_iter, obj->pages->nents, n)

		return sg_iter.page;

		return sg_page_iter_page(&sg_iter);



	return NULL;

}

drivers/gpu/drm/i915/i915_gem.c

+4 −4
Original line number Diff line number Diff line
@@ -442,7 +442,7 @@ i915_gem_shmem_pread(struct drm_device *dev, 


	for_each_sg_page(obj->pages->sgl, &sg_iter, obj->pages->nents,

			 offset >> PAGE_SHIFT) {

		struct page *page = sg_iter.page;

		struct page *page = sg_page_iter_page(&sg_iter);



		if (remain <= 0)

			break;
@@ -765,7 +765,7 @@ i915_gem_shmem_pwrite(struct drm_device *dev, 


	for_each_sg_page(obj->pages->sgl, &sg_iter, obj->pages->nents,

			 offset >> PAGE_SHIFT) {

		struct page *page = sg_iter.page;

		struct page *page = sg_page_iter_page(&sg_iter);

		int partial_cacheline_write;



		if (remain <= 0)
@@ -1647,7 +1647,7 @@ i915_gem_object_put_pages_gtt(struct drm_i915_gem_object *obj) 
		obj->dirty = 0;



	for_each_sg_page(obj->pages->sgl, &sg_iter, obj->pages->nents, 0) {

		struct page *page = sg_iter.page;

		struct page *page = sg_page_iter_page(&sg_iter);



		if (obj->dirty)

			set_page_dirty(page);
@@ -1827,7 +1827,7 @@ i915_gem_object_get_pages_gtt(struct drm_i915_gem_object *obj) 
err_pages:

	sg_mark_end(sg);

	for_each_sg_page(st->sgl, &sg_iter, st->nents, 0)

		page_cache_release(sg_iter.page);

		page_cache_release(sg_page_iter_page(&sg_iter));

	sg_free_table(st);

	kfree(st);

	return PTR_ERR(page);

drivers/gpu/drm/i915/i915_gem_dmabuf.c

+1 −1
Original line number Diff line number Diff line
@@ -130,7 +130,7 @@ static void *i915_gem_dmabuf_vmap(struct dma_buf *dma_buf) 


	i = 0;

	for_each_sg_page(obj->pages->sgl, &sg_iter, obj->pages->nents, 0);

		pages[i++] = sg_iter.page;

		pages[i++] = sg_page_iter_page(&sg_iter);



	obj->dma_buf_vmapping = vmap(pages, i, 0, PAGE_KERNEL);

	drm_free_large(pages);

drivers/gpu/drm/i915/i915_gem_gtt.c

+2 −4
Original line number Diff line number Diff line
@@ -123,8 +123,7 @@ static void gen6_ppgtt_insert_entries(struct i915_hw_ppgtt *ppgtt, 
	for_each_sg_page(pages->sgl, &sg_iter, pages->nents, 0) {

		dma_addr_t page_addr;



		page_addr = sg_dma_address(sg_iter.sg) +

				(sg_iter.sg_pgoffset << PAGE_SHIFT);

		page_addr = sg_page_iter_dma_address(&sg_iter);

		pt_vaddr[act_pte] = gen6_pte_encode(ppgtt->dev, page_addr,

						    cache_level);

		if (++act_pte == I915_PPGTT_PT_ENTRIES) {
@@ -424,8 +423,7 @@ static void gen6_ggtt_insert_entries(struct drm_device *dev, 
	dma_addr_t addr;



	for_each_sg_page(st->sgl, &sg_iter, st->nents, 0) {

		addr = sg_dma_address(sg_iter.sg) +

			(sg_iter.sg_pgoffset << PAGE_SHIFT);

		addr = sg_page_iter_dma_address(&sg_iter);

		iowrite32(gen6_pte_encode(dev, addr, level), &gtt_entries[i]);

		i++;

	}