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Commit 2d0d2ad4 authored by Karthik Anantha Ram's avatar Karthik Anantha Ram Committed by Jeyaprakash Soundrapandian
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msm: camera: debugfs to update clk rates dynamically



This change provides provision to read the supported clk
rates for each of the hardwares and one can vote for one
of the supported clk levels before streamon.

Change-Id: I9626fb87b6a72b70b4479562b6f50b31b85263be
Signed-off-by: default avatarKarthik Anantha Ram <kartanan@codeaurora.org>
Signed-off-by: default avatarJeyaprakash Soundrapandian <jsoundra@codeaurora.org>
parent 456a35e0
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+5 −0
Original line number Diff line number Diff line
@@ -108,6 +108,11 @@ about the device register map, interrupt map, clocks, regulators.
  Value type: <string>
  Definition: Source clock name.

- clock-control-debugfs
  Usage: optional
  Value type: <string>
  Definition: Enable/Disable clk rate control.

- clock-cntl-level
  Usage: required
  Value type: <string>
+5 −0
Original line number Diff line number Diff line
@@ -110,6 +110,11 @@ and name of firmware image.
  Value type: <string>
  Definition: Source clock name.

- clock-control-debugfs
  Usage: optional
  Value type: <string>
  Definition: Enable/Disable clk rate control.

- clocks
  Usage: required
  Value type: <phandle>
+4 −1
Original line number Diff line number Diff line
@@ -79,7 +79,10 @@ First Level Node - CAM IFE CSID device
  Value type: <string>
  Definition: Source clock name.


- clock-control-debugfs
  Usage: optional
  Value type: <string>
  Definition: Enable/Disable clk rate control.

Example:

+5 −0
Original line number Diff line number Diff line
@@ -91,6 +91,11 @@ Optional properties:
  Value type: <u32>
  Definition: List of clocks rates for optional clocks.

- clock-control-debugfs
  Usage: optional
  Value type: <string>
  Definition: Enable/Disable clk rate control.

Example:
	qcom,vfe0@acaf000 {
		cell-index = <0>;
+2 −5
Original line number Diff line number Diff line
@@ -596,11 +596,8 @@ static int cam_cpas_util_set_camnoc_axi_clk_rate(
		CAM_DBG(CAM_CPAS, "Setting camnoc axi clk rate : %llu %d",
			required_camnoc_bw, clk_rate);

		rc = cam_soc_util_set_clk_rate(
			soc_info->clk[soc_info->src_clk_idx],
			soc_info->clk_name[soc_info->src_clk_idx],
			clk_rate);
		if (rc)
		rc = cam_soc_util_set_src_clk_rate(soc_info, clk_rate);
		if (!rc)
			CAM_ERR(CAM_CPAS,
				"Failed in setting camnoc axi clk %llu %d %d",
				required_camnoc_bw, clk_rate, rc);
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