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Commit 2cae74ad authored by Gaurav Singhal's avatar Gaurav Singhal
Browse files

NFC: Add snapshot of NQxxx NFC driver 



Add the latest version of NQxxx NFC driver from 'msm-4.9
commit 71661100f78c ("NFC: Remove PMIC clock voting from HLOS")'.

After taking snapshot we have modified code to address
one of the banned API.

Change-Id: I4cf01400be377cbfb2d709292795d711a5688948
Signed-off-by: default avatarGaurav Singhal <gsinghal@codeaurora.org>
parent bc1c5404

Documentation/devicetree/bindings/nfc/nq-nci.txt

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Qualcomm Technologies, Inc NQxxxx NFC NCI device



Near Field Communication (NFC) device is based on NFC Controller Interface (NCI)



Required properties:



- compatible: "qcom,nq-nci"

- reg: NCI i2c slave address.

- qcom,nq-ven: specific gpio for hardware reset.

- qcom,nq-irq: specific gpio for read interrupt.

- qcom,nq-firm: gpio for firmware download

- qcom,nq-clkreq: gpio for clock

- interrupt-parent: Should be phandle for the interrupt controller

                    that services interrupts for this device.

- interrupts: Nfc read interrupt,gpio-clk-req interrupt





Recommended properties:



- interrupt-names: names of interrupts, should include "nfc_irq", used for reference





Optional properties:



- pinctrl-names, pinctrl-0, pincntrl-1: references to our pincntrl settings

- clocks, clock-names: must contain the NQxxxx's core clock.

- qcom,nq-esepwr: gpio to control power of secure element

- qcom,clk-src: NFC clock for antenna



Example:



	nq-nci@2b {

		compatible = "qcom,nq-nci";

		reg = <0x2b>;

		qcom,nq-irq = <&tlmm 29 0x00>;

		qcom,nq-ven = <&tlmm 30 0x00>;

		qcom,nq-firm = <&tlmm 93 0x00>;

		qcom,nq-clkreq = <&pm8998_gpios 21 0x00>;

		qcom,nq-esepwr = <&tlmm 116 0x00>;

		qcom,clk-src = "BBCLK2";

		interrupt-parent = <&tlmm>;

		interrupts = <29 0>;

		interrupt-names = "nfc_irq";

		pinctrl-names = "nfc_active","nfc_suspend";

		pinctrl-0 = <&nfc_int_active &nfc_disable_active>;

		pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;

		clocks = <&clock_rpm clk_bb_clk2_pin>;

		clock-names = "ref_clk";

	};

drivers/nfc/Kconfig

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@@ -59,3 +59,11 @@ source "drivers/nfc/nxp-nci/Kconfig" 
source "drivers/nfc/s3fwrn5/Kconfig"

source "drivers/nfc/st95hf/Kconfig"

endmenu



config NFC_NQ

        tristate "QTI NCI based NFC Controller Driver for NQx"

        depends on I2C

        help

          This enables the NFC driver for NQx based devices.

          This is for i2c connected version. NCI protocol logic

          resides in the usermode and it has no other NFC dependencies.

drivers/nfc/Makefile

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@@ -17,3 +17,4 @@ obj-$(CONFIG_NFC_ST_NCI) += st-nci/ 
obj-$(CONFIG_NFC_NXP_NCI)	+= nxp-nci/

obj-$(CONFIG_NFC_S3FWRN5)	+= s3fwrn5/

obj-$(CONFIG_NFC_ST95HF)	+= st95hf/

obj-$(CONFIG_NFC_NQ)		+= nq-nci.o

drivers/nfc/nq-nci.c

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File added.

Preview size limit exceeded, changes collapsed.

drivers/nfc/nq-nci.h

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/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#ifndef __NQ_NCI_H

#define __NQ_NCI_H



#include <linux/i2c.h>

#include <linux/types.h>

#include <linux/version.h>



#include <linux/semaphore.h>

#include <linux/completion.h>



#include <linux/ioctl.h>

#include <linux/cdev.h>

#include <linux/nfcinfo.h>



#define NFC_SET_PWR			_IOW(0xE9, 0x01, unsigned int)

#define ESE_SET_PWR			_IOW(0xE9, 0x02, unsigned int)

#define ESE_GET_PWR			_IOR(0xE9, 0x03, unsigned int)

#define SET_RX_BLOCK			_IOW(0xE9, 0x04, unsigned int)

#define SET_EMULATOR_TEST_POINT		_IOW(0xE9, 0x05, unsigned int)

#define NFCC_INITIAL_CORE_RESET_NTF	_IOW(0xE9, 0x10, unsigned int)



#define NFC_RX_BUFFER_CNT_START		(0x0)

#define PAYLOAD_HEADER_LENGTH		(0x3)

#define PAYLOAD_LENGTH_MAX		(256)

#define BYTE				(0x8)

#define NCI_IDENTIFIER			(0x10)



enum nfcc_initial_core_reset_ntf {

	TIMEDOUT_INITIAL_CORE_RESET_NTF = 0, /* 0*/

	ARRIVED_INITIAL_CORE_RESET_NTF, /* 1 */

	DEFAULT_INITIAL_CORE_RESET_NTF, /*2*/

};



enum nfcc_chip_variant {

	NFCC_NQ_210			= 0x48,	/**< NFCC NQ210 */

	NFCC_NQ_220			= 0x58,	/**< NFCC NQ220 */

	NFCC_NQ_310			= 0x40,	/**< NFCC NQ310 */

	NFCC_NQ_330			= 0x51,	/**< NFCC NQ330 */

	NFCC_PN66T			= 0x18,	/**< NFCC PN66T */

	NFCC_NOT_SUPPORTED	        = 0xFF	/**< NFCC is not supported */

};

#endif