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Commit 2c438c02 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: use gmbus irq to wait for gmbus idle 



GMBUS_ACTIVE has inverted sense and so doesn't fit into the
wait_hw_status helper, hence create a new gmbus_wait_idle functions.
Also, we only care about the idle irq event and nothing else, which
allows us to use the wait_event_timeout helper directly without
jumping through hoops to catch NAKs.

Since gen2/3 don't have gmbus interrupts, handle them separately with
the old wait_for macro.

This shaves another few ms off reading EDID from a hdmi screen on my
testbox here. EDID reading with interrupt driven gmbus is now as fast
as with busy-looping gmbus at 28 ms here (with negligible cpu
overhead).

Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 28c70f16

drivers/gpu/drm/i915/intel_i2c.c

+28 −4
Original line number Diff line number Diff line
@@ -203,6 +203,7 @@ intel_gpio_setup(struct intel_gmbus *bus, u32 pin) 
	algo->data = bus;

}



#define HAS_GMBUS_IRQ(dev) (INTEL_INFO(dev)->gen >= 4)

static int

gmbus_wait_hw_status(struct drm_i915_private *dev_priv,

		     u32 gmbus2_status,
@@ -239,6 +240,31 @@ gmbus_wait_hw_status(struct drm_i915_private *dev_priv, 
	return -ETIMEDOUT;

}



static int

gmbus_wait_idle(struct drm_i915_private *dev_priv)

{

	int ret;

	int reg_offset = dev_priv->gpio_mmio_base;



#define C ((I915_READ(GMBUS2 + reg_offset) & GMBUS_ACTIVE) == 0)



	if (!HAS_GMBUS_IRQ(dev_priv->dev))

		return wait_for(C, 10);



	/* Important: The hw handles only the first bit, so set only one! */

	I915_WRITE(GMBUS4 + reg_offset, GMBUS_IDLE_EN);



	ret = wait_event_timeout(dev_priv->gmbus_wait_queue, C, 10);



	I915_WRITE(GMBUS4 + reg_offset, 0);



	if (ret)

		return 0;

	else

		return -ETIMEDOUT;

#undef C

}



static int

gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,

		u32 gmbus1_index)
@@ -406,8 +432,7 @@ gmbus_xfer(struct i2c_adapter *adapter, 
	 * We will re-enable it at the start of the next xfer,

	 * till then let it sleep.

	 */

	if (wait_for((I915_READ(GMBUS2 + reg_offset) & GMBUS_ACTIVE) == 0,

		     10)) {

	if (gmbus_wait_idle(dev_priv)) {

		DRM_DEBUG_KMS("GMBUS [%s] timed out waiting for idle\n",

			 adapter->name);

		ret = -ETIMEDOUT;
@@ -431,8 +456,7 @@ gmbus_xfer(struct i2c_adapter *adapter, 
	 * it's slow responding and only answers on the 2nd retry.

	 */

	ret = -ENXIO;

	if (wait_for((I915_READ(GMBUS2 + reg_offset) & GMBUS_ACTIVE) == 0,

		     10)) {

	if (gmbus_wait_idle(dev_priv)) {

		DRM_DEBUG_KMS("GMBUS [%s] timed out after NAK\n",

			      adapter->name);

		ret = -ETIMEDOUT;