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Commit 2c22cbff authored by Harsh Shah's avatar Harsh Shah Committed by Gerrit - the friendly Code Review server
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Merge "DOWNSTREAM commit '7c269f67' AU307...

Merge "DOWNSTREAM commit '7c269f67' AU307 08/20" into dev/msm-4.14-camx
parents dcc70d2c 87c99fd3
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@@ -160,6 +160,12 @@ compatible = "qcom,sm6150-mtp"
compatible = "qcom,sm6150-cdp"
compatible = "qcom,sm6150-qrd"
compatible = "qcom,sm6150-idp"
compatible = "qcom,sm6150p-idp"
compatible = "qcom,sm6150p"
compatible = "qcom,sm6150p-qrd"
compatible = "qcom,sa6155-adp-star"
compatible = "qcom,sa6155p-adp-star"
compatible = "qcom,sa6155p"
compatible = "qcom,qcs405-rumi"
compatible = "qcom,qcs405-iot"
compatible = "qcom,qcs403-iot"
+2 −2
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@@ -2,10 +2,10 @@ Qualcomm Technologies, Inc. Video Clock & Reset Controller Bindings

Required properties:
- compatible: shall contain "qcom,videocc-sm8150" or "qcom,videocc-sm8150-v2" or
				"qcom,videocc-sm6150".
				"qcom,videocc-sm6150", "qcom,videocc-sdmmagpie".
- reg: shall contain base register location and length.
- reg-names: names of registers listed in the same order as in the reg property.
- vdd_mm-supply: the logic rail supply.
- vdd_<mm/cx>-supply: the logic rail supply which could be either MM or CX.
- clock-names: Shall contain "cfg_ahb_clk"
- clocks: phandle + clock reference to the GCC AHB clock.
- #clock-cells: shall contain 1.
+18 −0
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@@ -26,3 +26,21 @@ Optional properties:
 - himax,3v3-gpio       : gpio acting as 3.3 v supply.
 - himax,report_type    : Multi-touch protocol type. Default 0.
                                  0 for protocol A, 1 for protocol B.

Example:
	i2c@884000 {
		status = "okay";
		himax_ts@48 {
			compatible = "himax,hxcommon";
			reg = <0x48>;
			interrupt-parent = <&tlmm>;
			interrupts = <89 0x2008>;
			vdd-supply = <&pm6150_l10>;
			avdd-supply = <&pm6150l_l7>;
			himax,panel-coords = <0 1080 0 2160>;
			himax,display-coords = <0 1080 0 2160>;
			himax,irq-gpio = <&tlmm 89 0x00>;
			himax,rst-gpio = <&tlmm 88 0x00>;
			report_type = <1>;
		};
	};
+44 −0
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MSM Generic Serial Interface Infrared (GENI-IR) Controller

Required properties:
- compatible : Should be "qcom,msm-geni-ir"
- reg : Offset and length of the register region for the device
- reg-names : Register region name referenced in 'reg' above
	The only required register resource entry is:
	"base"       : GENI-IR controller register block
- interrupts : Interrupt numbers used by this controller
- interrupt-names : Interrupt resource names referenced in 'interrupts' above
	Required interrupt resource entries are:
	"geni-ir-core-irq"   : GENI-IR core interrupt
	"geni-ir-wakeup-irq" : GENI-IR wakeup interrupt
- qcom,geni-ir-gpio-tx  : GPIO pin number of the GENI-IR transmit line
- qcom,geni-ir-gpio-rx  : GPIO pin number of the GENI-IR receive line

Aliases :
Aliases may be optionally used for GENI-IR devices on a target.
The alias will have the following format:
	'geni_ir{n}' where n is the instance number.

GENI-IR device is the child device of the SPSS device.

Example:
	aliases {
		geni_ir1 = &geni_ir_1;
	};

	qcom,msm-spss@fc5c3000 {

		...

		geni_ir_1: qcom,msm-geni-ir@fc5c1000 {
			compatible = "qcom,msm-geni-ir";
			reg-names = "base";
			reg = <0xfc5c1000 0x1000>;
			interrupts = <0 284 0>, <0 285 0>;
			interrupt-names = "geni-ir-core-irq",
					  "geni-ir-wakeup-irq";
			qcom,geni-ir-gpio-tx = <&msmgpio 8 0>;
			qcom,geni-ir-gpio-rx = <&msmgpio 9 0>;
		};
	};
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@@ -91,6 +91,8 @@ memory allocation over a PCIe bridge
				hashing not supported.
- qcom,wlan-ce-db-over-pcie: Boolean context flag to represent WLAN CE DB
				over pcie bus or not.
- qcom,ipa-wdi2_over_gsi: Boolean context flag to indicate WDI2 offload over GSI
				supported or not.

IPA pipe sub nodes (A2 static pipes configurations):

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