Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 2b5c5798 authored by Jia-Ju Bai's avatar Jia-Ju Bai Committed by Mauro Carvalho Chehab
Browse files

media: i2c: adv7842: Replace mdelay() with msleep() and usleep_range() in adv7842_ddr_ram_test() 



adv7842_ddr_ram_test() is never called in atomic context.
It only calls from:
adv7842_ddr_ram_test() <- adv7842_command_ram_test() <- adv7842_ioctl()

adv7842_ddr_ram_test() calls mdelay() to busily wait,
which is not necessary.
mdelay() can be replaced with msleep() and usleep_range().

This is found by a static analysis tool named DCNS written by myself.

Signed-off-by: default avatarJia-Ju Bai <baijiaju1990@gmail.com>
Signed-off-by: default avatarHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab+samsung@kernel.org>
parent 17f330ce

drivers/media/i2c/adv7842.c

+4 −4
Original line number Diff line number Diff line
@@ -3102,7 +3102,7 @@ static int adv7842_ddr_ram_test(struct v4l2_subdev *sd) 
	sdp_write(sd, 0x12, 0x00); /* Disable 3D comb, Frame TBC & 3DNR */

	io_write(sd, 0xFF, 0x04);  /* Reset memory controller */



	mdelay(5);

	usleep_range(5000, 6000);



	sdp_write(sd, 0x12, 0x00);    /* Disable 3D Comb, Frame TBC & 3DNR */

	sdp_io_write(sd, 0x2A, 0x01); /* Memory BIST Initialisation */
@@ -3116,12 +3116,12 @@ static int adv7842_ddr_ram_test(struct v4l2_subdev *sd) 
	sdp_io_write(sd, 0x7d, 0x00); /* Memory BIST Initialisation */

	sdp_io_write(sd, 0x7e, 0x1a); /* Memory BIST Initialisation */



	mdelay(5);

	usleep_range(5000, 6000);



	sdp_io_write(sd, 0xd9, 0xd5); /* Enable BIST Test */

	sdp_write(sd, 0x12, 0x05); /* Enable FRAME TBC & 3D COMB */



	mdelay(20);

	msleep(20);



	for (i = 0; i < 10; i++) {

		u8 result = sdp_io_read(sd, 0xdb);
@@ -3132,7 +3132,7 @@ static int adv7842_ddr_ram_test(struct v4l2_subdev *sd) 
			else

				pass++;

		}

		mdelay(20);

		msleep(20);

	}



	v4l2_dbg(1, debug, sd,