Merge "pinctrl: qcom: Add sdm429W pinctrl driver"

Qualcomm Technologies, Inc. SDM429W TLMM block

This binding describes the Top Level Mode Multiplexer block found in the

MSM8937 platform.

- compatible:

	Usage: required

	Value type: <string>

	Definition: must be "qcom,sdm429w-pinctrl"

- reg:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: the base address and size of the TLMM register space

		    provided as "pinctrl_regs".

- reg-names:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: Provides labels for the reg property.

- interrupts:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: should specify the TLMM summary IRQ.

- interrupt-controller:

	Usage: required

	Value type: <none>

	Definition: identifies this node as an interrupt controller

- #interrupt-cells:

	Usage: required

	Value type: <u32>

	Definition: must be 2. Specifying the pin number and flags, as defined

		    in <dt-bindings/interrupt-controller/irq.h>

- gpio-controller:

	Usage: required

	Value type: <none>

	Definition: identifies this node as a gpio controller

- #gpio-cells:

	Usage: required

	Value type: <u32>

	Definition: must be 2. Specifying the pin number and flags, as defined

		    in <dt-bindings/gpio/gpio.h>

Please refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for

a general description of GPIO and interrupt bindings.

Please refer to pinctrl-bindings.txt in this directory for details of the

common pinctrl bindings used by client devices, including the meaning of the

phrase "pin configuration node".

The pin configuration nodes act as a container for an arbitrary number of

subnodes. Each of these subnodes represents some desired configuration for a

pin, a group, or a list of pins or groups. This configuration can include the

mux function to select on those pin(s)/group(s), and various pin configuration

parameters, such as pull-up, drive strength, etc.

PIN CONFIGURATION NODES:

The name of each subnode is not important; all subnodes should be enumerated

and processed purely based on their content.

Each subnode only affects those parameters that are explicitly listed. In

other words, a subnode that lists a mux function but no pin configuration

parameters implies no information about any pin configuration parameters.

Similarly, a pin subnode that describes a pullup parameter implies no

information about e.g. the mux function.

The following generic properties as defined in pinctrl-bindings.txt are valid

to specify in a pin configuration subnode:

- pins:

	Usage: required

	Value type: <string-array>

	Definition: List of gpio pins affected by the properties specified in

		    this subnode.

		    Valid pins are:

		    gpio0-gpio133,

		    sdc1_clk,

		    sdc1_cmd,

		    sdc1_data,

		    sdc1_rclk,

		    sdc2_clk,

		    sdc2_cmd,

		    sdc2_data,

		    qdsd_clk,

		    qdsd_cmd,

		    qdsd_data0,

		    qdsd_data1,

		    qdsd_data2,

		    qdsd_data3,

- function:

	Usage: required

	Value type: <string>

	Definition: Specify the alternative function to be configured for the

		    specified pins. Functions are only valid for gpio pins.

		    Valid values are:

        qdss_tracedata_b, blsp_uart1, gpio, blsp_spi1, adsp_ext, blsp_i2c1, prng_rosc,

        qdss_cti_trig_out_b0, blsp_spi2, blsp_uart2, blsp_uart3, pbs0, pbs1,

        pwr_modem_enabled_b, blsp_i2c3, gcc_gp2_clk_b, ldo_update,

        atest_combodac_to_gpio_native, ldo_en, blsp_i2c2, gcc_gp1_clk_b, pbs2,

        atest_gpsadc_dtest0_native, blsp_spi3, gcc_gp3_clk_b, blsp_spi4, blsp_uart4,

        sec_mi2s, pwr_nav_enabled_b, codec_mad, pwr_crypto_enabled_b, blsp_i2c4,

        blsp_spi5, blsp_uart5, qdss_traceclk_a, atest_bbrx1, m_voc,

        qdss_cti_trig_in_a0, qdss_cti_trig_in_b0, blsp_i2c6, qdss_traceclk_b,

        atest_wlan0, atest_wlan1, atest_bbrx0, blsp_i2c5, qdss_tracectl_a,

        atest_gpsadc_dtest1_native, qdss_tracedata_a, blsp_spi6, blsp_uart6,

        qdss_tracectl_b, mdp_vsync, pri_mi2s_mclk_a, sec_mi2s_mclk_a, cam_mclk,

        cci_i2c, pwr_modem_enabled_a, cci_timer0, cci_timer1, cam1_standby,

        pwr_nav_enabled_a, cam1_rst, pwr_crypto_enabled_a, forced_usb,

        qdss_cti_trig_out_b1, cam2_rst, webcam_standby, cci_async, webcam_rst,

        ov_ldo, sd_write, accel_int, gcc_gp1_clk_a, alsp_int, gcc_gp2_clk_a,

        mag_int, gcc_gp3_clk_a, blsp6_spi, fp_int, qdss_cti_trig_in_b1, uim_batt,

        cam2_standby, uim1_data, uim1_clk, uim1_reset, uim1_present, uim2_data,

        uim2_clk, uim2_reset, uim2_present, sensor_rst, mipi_dsi0, smb_int,

        cam0_ldo, us_euro, atest_char3, dbg_out, bimc_dte0, ts_resout, ts_sample,

        sec_mi2s_mclk_b, pri_mi2s, sdcard_det, atest_char1, ebi_cdc, audio_reset,

        atest_char0, audio_ref, cdc_pdm0, pri_mi2s_mclk_b, lpass_slimbus,

        lpass_slimbus0, lpass_slimbus1, codec_int1, codec_int2, wcss_bt,

        atest_char2, ebi_ch0, wcss_wlan2, wcss_wlan1, wcss_wlan0, wcss_wlan,

        wcss_fm, ext_lpass, cri_trng, cri_trng1, cri_trng0, blsp_spi7, blsp_uart7,

        pri_mi2s_ws, blsp_i2c7, gcc_tlmm, dmic0_clk, dmic0_data, key_volp,

        qdss_cti_trig_in_a1, us_emitter, wsa_irq, wsa_io, wsa_reset, blsp_spi8,

        blsp_uart8, blsp_i2c8, gcc_plltest, nav_pps_in_a, pa_indicator, modem_tsync,

        nav_tsync, nav_pps_in_b, nav_pps, gsm0_tx, atest_char, atest_tsens,

        bimc_dte1, ssbi_wtr1, fp_gpio, coex_uart, key_snapshot, key_focus, nfc_pwr,

        blsp8_spi, qdss_cti_trig_out_a0, qdss_cti_trig_out_a1

- bias-disable:

	Usage: optional

	Value type: <none>

	Definition: The specified pins should be configued as no pull.

- bias-pull-down:

	Usage: optional

	Value type: <none>

	Definition: The specified pins should be configued as pull down.

- bias-pull-up:

	Usage: optional

	Value type: <none>

	Definition: The specified pins should be configued as pull up.

- output-high:

	Usage: optional

	Value type: <none>

	Definition: The specified pins are configured in output mode, driven

		    high.

		    Not valid for sdc pins.

- output-low:

	Usage: optional

	Value type: <none>

	Definition: The specified pins are configured in output mode, driven

		    low.

		    Not valid for sdc pins.

- drive-strength:

	Usage: optional

	Value type: <u32>

	Definition: Selects the drive strength for the specified pins, in mA.

		    Valid values are: 2, 4, 6, 8, 10, 12, 14 and 16

Example:

	tlmm: pinctrl@1000000 {

		compatible = "qcom,sdm429w-pinctrl";

		reg = <0x1000000 0x300000>;

		reg-names = "pinctrl_regs";

		interrupts = <0 208 0>;

		gpio-controller;

		#gpio-cells = <2>;

		interrupt-controller;

		#interrupt-cells = <2>;

		pmx-uartconsole {

			uart_console_active: uart_console_active {

				mux {

					pins = "gpio4", "gpio5";

					function = "blsp_uart2";

				};

				config {

					pins = "gpio4", "gpio5";

					drive-strength = <2>;

					bias-disable;

				};

			};

			uart_console_sleep: uart_console_sleep {

				mux {

					pins = "gpio4", "gpio5";

					function = "blsp_uart2";

				};

				config {

					pins = "gpio4", "gpio5";

					drive-strength = <2>;

					bias-pull-down;

				};

			};

		};

	};

	select HWSPINLOCK

	select HWSPINLOCK

	select HAVE_CLK_PREPARE

	select HAVE_CLK_PREPARE

config ARCH_SDM429W

	bool "Enable support for SDM429W"

	select CPU_V7

	select CLKDEV_LOOKUP

	select HAVE_CLK

	select HAVE_CLK_PREPARE

	select PM_OPP

	select SOC_BUS

	select MSM_IRQ

	select THERMAL_WRITABLE_TRIPS

	select ARM_GIC

	select ARM_AMBA

	select SPARSE_IRQ

	select MULTI_IRQ_HANDLER

	select HAVE_ARM_ARCH_TIMER

	select MAY_HAVE_SPARSE_IRQ

	select COMMON_CLK

	select COMMON_CLK_QCOM

	select QCOM_GDSC

	select PINCTRL_MSM

	select USE_PINCTRL_IRQ

	select MSM_PM if PM

	select QMI_ENCDEC

	select CPU_FREQ

	select PM_DEVFREQ

	select MSM_DEVFREQ_DEVBW

	select DEVFREQ_SIMPLE_DEV

	select DEVFREQ_GOV_MSM_BW_HWMON

	select MSM_QDSP6V2_CODECS

	select MSM_AUDIO_QDSP6V2 if SND_SOC

	select MSM_RPM_SMD

	select PCI

	select MSM_JTAG_MM if CORESIGHT_ETM

	select MSM_RPM_LOG

	select MSM_RPM_STATS_LOG

endmenu

endmenu

endif

endif

obj-$(CONFIG_SMP)	+= platsmp.o

obj-$(CONFIG_SMP)	+= platsmp.o

obj-$(CONFIG_ARCH_QCS405) += board-qcs405.o

obj-$(CONFIG_ARCH_QCS405) += board-qcs405.o

obj-$(CONFIG_ARCH_QCS403) += board-qcs403.o

obj-$(CONFIG_ARCH_QCS403) += board-qcs403.o

obj-$(CONFIG_ARCH_SDM429W) += board-sdm429w.o

obj-$(CONFIG_ARCH_TRINKET) += board-trinket.o

obj-$(CONFIG_ARCH_TRINKET) += board-trinket.o

obj-$(CONFIG_ARCH_SDXPRAIRIE) += board-sdxprairie.o

obj-$(CONFIG_ARCH_SDXPRAIRIE) += board-sdxprairie.o

obj-$(CONFIG_ARCH_MDM9607) += board-mdm9607.o

obj-$(CONFIG_ARCH_MDM9607) += board-mdm9607.o

/* Copyright (c) 2020, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */

#include <linux/kernel.h>

#include "board-dt.h"

#include <asm/mach/map.h>

#include <asm/mach/arch.h>

static const char *sdm429w_dt_match[] __initconst = {

	"qcom,sdm429",

	"qcom,sda429",

	"qcom,sdm429w",

	"qcom,sda429w",

	NULL

};

static void __init sdm429w_init(void)

{

	board_dt_populate(NULL);

}

DT_MACHINE_START(SDM429W_DT,

	"Qualcomm Technologies, Inc. QCS403 (Flattened Device Tree)")

	.init_machine           = sdm429w_init,

	.dt_compat              = sdm429w_dt_match,

MACHINE_END

	  This enables support for the TRINKET chipset. If you do not

	  This enables support for the TRINKET chipset. If you do not

	  wish to build a kernel that runs on this chipset, say 'N' here.

	  wish to build a kernel that runs on this chipset, say 'N' here.

config ARCH_SDM429W

	bool "Enable Support for Qualcomm Technologies Inc. SDM429W"

	depends on ARCH_QCOM

	select CPU_FREQ_QCOM

	select COMMON_CLK

	select COMMON_CLK_QCOM

	help

	  This configuration option enables support to build kernel for

	  SDM429W SoC.

	  If you do not wish to build a kernel that runs on this chipset,

	  say 'N' here.

config ARCH_REALTEK

config ARCH_REALTEK

	bool "Realtek Platforms"

	bool "Realtek Platforms"

	help

	help