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Commit 2a7f37d5 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add UFS support for trinket"

parents 1bbadfe2 6783992d

Documentation/devicetree/bindings/clock/qcom,gcc.txt

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ Required properties : 
			"qcom,gcc-sm6150"

			"qcom,gcc-sdmmagpie"

			"qcom,gcc-sdxprairie"

			"qcom,gcc-trinket"



- reg : shall contain base register location and length

- #clock-cells : shall contain 1

arch/arm64/boot/dts/qcom/trinket-idp.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -154,3 +154,29 @@ 
	qcom,hw-die-temp-mitigation;

	status = "ok";

};



&ufsphy_mem {

	compatible = "qcom,ufs-phy-qmp-v3-660";



	vdda-phy-supply = <&pm6125_l4>; /* 0.9v */

	vdda-pll-supply = <&pm6125_l10>; /* 1.8v */

	vdda-phy-max-microamp = <51400>;

	vdda-pll-max-microamp = <14200>;



	status = "ok";

};



&ufshc_mem {

	vdd-hba-supply = <&ufs_phy_gdsc>;

	vdd-hba-fixed-regulator;

	vcc-supply = <&pm6125_l24>;

	vcc-voltage-level = <2950000 2960000>;

	vccq2-supply = <&pm6125_l11>;

	vcc-max-microamp = <600000>;

	vccq2-max-microamp = <600000>;



	qcom,vddp-ref-clk-supply = <&pm6125_l18>;

	qcom,vddp-ref-clk-max-microamp = <100>;



	status = "ok";

};

arch/arm64/boot/dts/qcom/trinket-pinctrl.dtsi

+46 −0
Original line number Diff line number Diff line
@@ -746,5 +746,51 @@ 
				bias-disable;

			};

		};



		ufs_dev_reset_assert: ufs_dev_reset_assert {

			config {

				pins = "ufs_reset";

				bias-pull-down;		/* default: pull down */

				/*

				 * UFS_RESET driver strengths are having

				 * different values/steps compared to typical

				 * GPIO drive strengths.

				 *

				 * Following table clarifies:

				 *

				 * HDRV value | UFS_RESET | Typical GPIO

				 *   (dec)    |   (mA)    |    (mA)

				 *     0      |   0.8     |    2

				 *     1      |   1.55    |    4

				 *     2      |   2.35    |    6

				 *     3      |   3.1     |    8

				 *     4      |   3.9     |    10

				 *     5      |   4.65    |    12

				 *     6      |   5.4     |    14

				 *     7      |   6.15    |    16

				 *

				 * POR value for UFS_RESET HDRV is 3 which means

				 * 3.1mA and we want to use that. Hence just

				 * specify 8mA to "drive-strength" binding and

				 * that should result into writing 3 to HDRV

				 * field.

				 */

				drive-strength = <8>;	/* default: 3.1 mA */

				output-low; /* active low reset */

			};

		};



		ufs_dev_reset_deassert: ufs_dev_reset_deassert {

			config {

				pins = "ufs_reset";

				bias-pull-down;		/* default: pull down */

				/*

				 * default: 3.1 mA

				 * check comments under ufs_dev_reset_assert

				 */

				drive-strength = <8>;

				output-high; /* active low reset */

			};

		};

	};

};

arch/arm64/boot/dts/qcom/trinket-qrd.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -147,3 +147,29 @@ 
	qcom,hw-die-temp-mitigation;

	status = "ok";

};



&ufsphy_mem {

	compatible = "qcom,ufs-phy-qmp-v3-660";



	vdda-phy-supply = <&pm6125_l4>; /* 0.9v */

	vdda-pll-supply = <&pm6125_l10>; /* 1.8v */

	vdda-phy-max-microamp = <51400>;

	vdda-pll-max-microamp = <14200>;



	status = "ok";

};



&ufshc_mem {

	vdd-hba-supply = <&ufs_phy_gdsc>;

	vdd-hba-fixed-regulator;

	vcc-supply = <&pm6125_l24>;

	vcc-voltage-level = <2950000 2960000>;

	vccq2-supply = <&pm6125_l11>;

	vcc-max-microamp = <600000>;

	vccq2-max-microamp = <600000>;



	qcom,vddp-ref-clk-supply = <&pm6125_l18>;

	qcom,vddp-ref-clk-max-microamp = <100>;



	status = "ok";

};

arch/arm64/boot/dts/qcom/trinket-rumi.dtsi

+34 −0
Original line number Diff line number Diff line
@@ -151,3 +151,37 @@ 


	status = "ok";

};



&ufsphy_mem {

	compatible = "qcom,ufs-phy-qrbtc-sdm845";



	vdda-phy-supply = <&pm6125_l4>; /* 0.9v */

	vdda-pll-supply = <&pm6125_l10>; /* 1.8v */

	vdda-phy-max-microamp = <51400>;

	vdda-pll-max-microamp = <14200>;



	status = "ok";

};



&ufshc_mem {

	limit-tx-hs-gear = <1>;

	limit-rx-hs-gear = <1>;

	scsi-cmd-timeout = <300000>;



	vdd-hba-supply = <&ufs_phy_gdsc>;

	vdd-hba-fixed-regulator;

	vcc-supply = <&pm6125_l24>;

	vccq2-supply = <&pm6125_l11>;

	vcc-max-microamp = <600000>;

	vccq2-max-microamp = <600000>;



	qcom,vddp-ref-clk-supply = <&pm6125_l18>;

	qcom,vddp-ref-clk-max-microamp = <100>;

	qcom,vddp-ref-clk-min-uV = <1232000>;

	qcom,vddp-ref-clk-max-uV = <1232000>;



	qcom,disable-lpm;

	rpm-level = <0>;

	spm-level = <0>;

	status = "ok";

};