m68k: Remove the broken Hades support (29c8a246) · Commits · e / devices / android_kernel_xiaomi_nabu

arch/m68k/Kconfig

+0 −13

Original line number	Diff line number	Diff line
		@@ -122,22 +122,9 @@ config ATARI
		this kernel on an Atari, say Y here and browse the material
		available in <file:Documentation/m68k>; otherwise say N.

		config HADES
		bool "Hades support"
		depends on ATARI && BROKEN
		help
		This option enables support for the Hades Atari clone. If you plan
		to use this kernel on a Hades, say Y here; otherwise say N.

		config PCI
		bool
		depends on HADES
		default y
		help
		Find out whether you have a PCI motherboard. PCI is the name of a
		bus system, i.e. the way the CPU talks to the other stuff inside
		your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
		VESA. If you have PCI, say Y, otherwise N.

		config MAC
		bool "Macintosh support"

arch/m68k/atari/Makefile

+0 −3

Original line number	Diff line number	Diff line
		@@ -5,7 +5,4 @@
		obj-y := config.o time.o debug.o ataints.o stdma.o \
		atasound.o stram.o

		ifeq ($(CONFIG_PCI),y)
		obj-$(CONFIG_HADES) += hades-pci.o
		endif
		obj-$(CONFIG_ATARI_KBD_CORE) += atakeyb.o

arch/m68k/atari/ataints.c

+2 −4

Original line number	Diff line number	Diff line
		@@ -407,11 +407,9 @@ void __init atari_init_IRQ(void)
		* gets overruns)
		*/

		if (!MACH_IS_HADES) {
		vectors[VEC_INT2] = falcon_hblhandler;
		vectors[VEC_INT4] = falcon_hblhandler;
		}
		}

		if (ATARIHW_PRESENT(PCM_8BIT) && ATARIHW_PRESENT(MICROWIRE)) {
		/* Initialize the LM1992 Sound Controller to enable

arch/m68k/atari/config.c

+12 −25

Original line number	Diff line number	Diff line
		@@ -231,7 +231,7 @@ void __init config_atari(void)
		*/

		printk("Atari hardware found: ");
		if (MACH_IS_MEDUSA \|\| MACH_IS_HADES) {
		if (MACH_IS_MEDUSA) {
		/* There's no Atari video hardware on the Medusa, but all the
		* addresses below generate a DTACK so no bus error occurs! */
		} else if (hwreg_present(f030_xreg)) {
		@@ -269,10 +269,6 @@ void __init config_atari(void)
		ATARIHW_SET(SCSI_DMA);
		printk("TT_SCSI_DMA ");
		}
		if (!MACH_IS_HADES && hwreg_present(&st_dma.dma_hi)) {
		ATARIHW_SET(STND_DMA);
		printk("STND_DMA ");
		}
		/*
		* The ST-DMA address registers aren't readable
		* on all Medusas, so the test below may fail
		@@ -294,12 +290,11 @@ void __init config_atari(void)
		ATARIHW_SET(YM_2149);
		printk("YM2149 ");
		}
		if (!MACH_IS_MEDUSA && !MACH_IS_HADES &&
		hwreg_present(&tt_dmasnd.ctrl)) {
		if (!MACH_IS_MEDUSA && hwreg_present(&tt_dmasnd.ctrl)) {
		ATARIHW_SET(PCM_8BIT);
		printk("PCM ");
		}
		if (!MACH_IS_HADES && hwreg_present(&falcon_codec.unused5)) {
		if (hwreg_present(&falcon_codec.unused5)) {
		ATARIHW_SET(CODEC);
		printk("CODEC ");
		}
		@@ -313,7 +308,7 @@ void __init config_atari(void)
		(tt_scc_dma.dma_ctrl = 0x01, (tt_scc_dma.dma_ctrl & 1) == 1) &&
		(tt_scc_dma.dma_ctrl = 0x00, (tt_scc_dma.dma_ctrl & 1) == 0)
		#else
		!MACH_IS_MEDUSA && !MACH_IS_HADES
		!MACH_IS_MEDUSA
		#endif
		) {
		ATARIHW_SET(SCC_DMA);
		@@ -327,10 +322,7 @@ void __init config_atari(void)
		ATARIHW_SET(ST_ESCC);
		printk("ST_ESCC ");
		}
		if (MACH_IS_HADES) {
		ATARIHW_SET(VME);
		printk("VME ");
		} else if (hwreg_present(&tt_scu.sys_mask)) {
		if (hwreg_present(&tt_scu.sys_mask)) {
		ATARIHW_SET(SCU);
		/* Assume a VME bus if there's a SCU */
		ATARIHW_SET(VME);
		@@ -340,7 +332,7 @@ void __init config_atari(void)
		ATARIHW_SET(ANALOG_JOY);
		printk("ANALOG_JOY ");
		}
		if (!MACH_IS_HADES && hwreg_present(blitter.halftone)) {
		if (hwreg_present(blitter.halftone)) {
		ATARIHW_SET(BLITTER);
		printk("BLITTER ");
		}
		@@ -349,8 +341,7 @@ void __init config_atari(void)
		printk("IDE ");
		}
		#if 1 /* This maybe wrong */
		if (!MACH_IS_MEDUSA && !MACH_IS_HADES &&
		hwreg_present(&tt_microwire.data) &&
		if (!MACH_IS_MEDUSA && hwreg_present(&tt_microwire.data) &&
		hwreg_present(&tt_microwire.mask) &&
		(tt_microwire.mask = 0x7ff,
		udelay(1),
		@@ -369,19 +360,18 @@ void __init config_atari(void)
		mach_hwclk = atari_tt_hwclk;
		mach_set_clock_mmss = atari_tt_set_clock_mmss;
		}
		if (!MACH_IS_HADES && hwreg_present(&mste_rtc.sec_ones)) {
		if (hwreg_present(&mste_rtc.sec_ones)) {
		ATARIHW_SET(MSTE_CLK);
		printk("MSTE_CLK ");
		mach_hwclk = atari_mste_hwclk;
		mach_set_clock_mmss = atari_mste_set_clock_mmss;
		}
		if (!MACH_IS_MEDUSA && !MACH_IS_HADES &&
		hwreg_present(&dma_wd.fdc_speed) &&
		if (!MACH_IS_MEDUSA && hwreg_present(&dma_wd.fdc_speed) &&
		hwreg_write(&dma_wd.fdc_speed, 0)) {
		ATARIHW_SET(FDCSPEED);
		printk("FDC_SPEED ");
		}
		if (!MACH_IS_HADES && !ATARIHW_PRESENT(ST_SCSI)) {
		if (!ATARIHW_PRESENT(ST_SCSI)) {
		ATARIHW_SET(ACSI);
		printk("ACSI ");
		}
		@@ -449,7 +439,7 @@ void __init config_atari(void)
		* 0xFFxxxxxx -> 0x00xxxxxx, so that the first 16MB is accessible
		* in the last 16MB of the address space.
		*/
		tos_version = (MACH_IS_MEDUSA \|\| MACH_IS_HADES) ?
		tos_version = (MACH_IS_MEDUSA) ?
		0xfff : (unsigned short )0xff000002;
		atari_rtc_year_offset = (tos_version < 0x306) ? 70 : 68;
		}
		@@ -511,8 +501,7 @@ static void atari_reset(void)
		* On the Medusa, phys. 0x4 may contain garbage because it's no
		* ROM. See above for explanation why we cannot use PTOV(4).
		*/
		reset_addr = MACH_IS_HADES ? 0x7fe00030 :
		MACH_IS_MEDUSA \|\| MACH_IS_AB40 ? 0xe00030 :
		reset_addr = MACH_IS_MEDUSA \|\| MACH_IS_AB40 ? 0xe00030 :
		(unsigned long ) 0xff000004;

		/* reset ACIA for switch off OverScan, if it's active */
		@@ -606,8 +595,6 @@ static void atari_get_model(char *model)
		if (MACH_IS_MEDUSA)
		/* Medusa has TT _MCH cookie */
		strcat(model, "Medusa");
		else if (MACH_IS_HADES)
		strcat(model, "Hades");
		else
		strcat(model, "TT");
		break;

arch/m68k/atari/hades-pci.c

deleted100644 → 0

+0 −440

Original line number	Diff line number	Diff line
		/*
		* hades-pci.c - Hardware specific PCI BIOS functions the Hades Atari clone.
		*
		* Written by Wout Klaren.
		*/

		#include <linux/init.h>
		#include <linux/kernel.h>
		#include <asm/io.h>

		#if 0
		# define DBG_DEVS(args) printk args
		#else
		# define DBG_DEVS(args)
		#endif

		#if defined(CONFIG_PCI) && defined(CONFIG_HADES)

		#include <linux/slab.h>
		#include <linux/mm.h>
		#include <linux/pci.h>

		#include <asm/atarihw.h>
		#include <asm/atariints.h>
		#include <asm/byteorder.h>
		#include <asm/pci.h>

		#define HADES_MEM_BASE 0x80000000
		#define HADES_MEM_SIZE 0x20000000
		#define HADES_CONFIG_BASE 0xA0000000
		#define HADES_CONFIG_SIZE 0x10000000
		#define HADES_IO_BASE 0xB0000000
		#define HADES_IO_SIZE 0x10000000
		#define HADES_VIRT_IO_SIZE 0x00010000 /* Only 64k is remapped and actually used. */

		#define N_SLOTS 4 /* Number of PCI slots. */

		static const char pci_mem_name[] = "PCI memory space";
		static const char pci_io_name[] = "PCI I/O space";
		static const char pci_config_name[] = "PCI config space";

		static struct resource config_space = {
		.name = pci_config_name,
		.start = HADES_CONFIG_BASE,
		.end = HADES_CONFIG_BASE + HADES_CONFIG_SIZE - 1
		};
		static struct resource io_space = {
		.name = pci_io_name,
		.start = HADES_IO_BASE,
		.end = HADES_IO_BASE + HADES_IO_SIZE - 1
		};

		static const unsigned long pci_conf_base_phys[] = {
		0xA0080000, 0xA0040000, 0xA0020000, 0xA0010000
		};
		static unsigned long pci_conf_base_virt[N_SLOTS];
		static unsigned long pci_io_base_virt;

		/*
		* static void *mk_conf_addr(unsigned char bus, unsigned char device_fn,
		* unsigned char where)
		*
		* Calculate the address of the PCI configuration area of the given
		* device.
		*
		* BUG: boards with multiple functions are probably not correctly
		* supported.
		*/

		static void mk_conf_addr(struct pci_dev dev, int where)
		{
		int device = dev->devfn >> 3, function = dev->devfn & 7;
		void *result;

		DBG_DEVS(("mk_conf_addr(bus=%d ,device_fn=0x%x, where=0x%x, pci_addr=0x%p)\n",
		dev->bus->number, dev->devfn, where, pci_addr));

		if (device > 3)
		{
		DBG_DEVS(("mk_conf_addr: device (%d) > 3, returning NULL\n", device));
		return NULL;
		}

		if (dev->bus->number != 0)
		{
		DBG_DEVS(("mk_conf_addr: bus (%d) > 0, returning NULL\n", device));
		return NULL;
		}

		result = (void *) (pci_conf_base_virt[device] \| (function << 8) \| (where));
		DBG_DEVS(("mk_conf_addr: returning pci_addr 0x%lx\n", (unsigned long) result));
		return result;
		}

		static int hades_read_config_byte(struct pci_dev dev, int where, u8 value)
		{
		volatile unsigned char *pci_addr;

		*value = 0xff;

		if ((pci_addr = (unsigned char *) mk_conf_addr(dev, where)) == NULL)
		return PCIBIOS_DEVICE_NOT_FOUND;

		value = pci_addr;

		return PCIBIOS_SUCCESSFUL;
		}

		static int hades_read_config_word(struct pci_dev dev, int where, u16 value)
		{
		volatile unsigned short *pci_addr;

		*value = 0xffff;

		if (where & 0x1)
		return PCIBIOS_BAD_REGISTER_NUMBER;

		if ((pci_addr = (unsigned short *) mk_conf_addr(dev, where)) == NULL)
		return PCIBIOS_DEVICE_NOT_FOUND;

		value = le16_to_cpu(pci_addr);

		return PCIBIOS_SUCCESSFUL;
		}

		static int hades_read_config_dword(struct pci_dev dev, int where, u32 value)
		{
		volatile unsigned int *pci_addr;
		unsigned char header_type;
		int result;

		*value = 0xffffffff;

		if (where & 0x3)
		return PCIBIOS_BAD_REGISTER_NUMBER;

		if ((pci_addr = (unsigned int *) mk_conf_addr(dev, where)) == NULL)
		return PCIBIOS_DEVICE_NOT_FOUND;

		value = le32_to_cpu(pci_addr);

		/*
		* Check if the value is an address on the bus. If true, add the
		* base address of the PCI memory or PCI I/O area on the Hades.
		*/

		if ((result = hades_read_config_byte(dev, PCI_HEADER_TYPE,
		&header_type)) != PCIBIOS_SUCCESSFUL)
		return result;

		if (((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_1)) \|\|
		((header_type != PCI_HEADER_TYPE_BRIDGE) && ((where >= PCI_BASE_ADDRESS_2) &&
		(where <= PCI_BASE_ADDRESS_5))))
		{
		if ((*value & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO)
		{
		/*
		* Base address register that contains an I/O address. If the
		* address is valid on the Hades (0 <= *value < HADES_VIRT_IO_SIZE),
		* add 'pci_io_base_virt' to the value.
		*/

		if (*value < HADES_VIRT_IO_SIZE)
		*value += pci_io_base_virt;
		}
		else
		{
		/*
		* Base address register that contains an memory address. If the
		* address is valid on the Hades (0 <= *value < HADES_MEM_SIZE),
		* add HADES_MEM_BASE to the value.
		*/

		if (*value == 0)
		{
		/*
		* Base address is 0. Test if this base
		* address register is used.
		*/

		*pci_addr = 0xffffffff;
		if (*pci_addr != 0)
		{
		pci_addr = value;
		if (*value < HADES_MEM_SIZE)
		*value += HADES_MEM_BASE;
		}
		}
		else
		{
		if (*value < HADES_MEM_SIZE)
		*value += HADES_MEM_BASE;
		}
		}
		}

		return PCIBIOS_SUCCESSFUL;
		}

		static int hades_write_config_byte(struct pci_dev *dev, int where, u8 value)
		{
		volatile unsigned char *pci_addr;

		if ((pci_addr = (unsigned char *) mk_conf_addr(dev, where)) == NULL)
		return PCIBIOS_DEVICE_NOT_FOUND;

		*pci_addr = value;

		return PCIBIOS_SUCCESSFUL;
		}

		static int hades_write_config_word(struct pci_dev *dev, int where, u16 value)
		{
		volatile unsigned short *pci_addr;

		if ((pci_addr = (unsigned short *) mk_conf_addr(dev, where)) == NULL)
		return PCIBIOS_DEVICE_NOT_FOUND;

		*pci_addr = cpu_to_le16(value);

		return PCIBIOS_SUCCESSFUL;
		}

		static int hades_write_config_dword(struct pci_dev *dev, int where, u32 value)
		{
		volatile unsigned int *pci_addr;
		unsigned char header_type;
		int result;

		if ((pci_addr = (unsigned int *) mk_conf_addr(dev, where)) == NULL)
		return PCIBIOS_DEVICE_NOT_FOUND;

		/*
		* Check if the value is an address on the bus. If true, subtract the
		* base address of the PCI memory or PCI I/O area on the Hades.
		*/

		if ((result = hades_read_config_byte(dev, PCI_HEADER_TYPE,
		&header_type)) != PCIBIOS_SUCCESSFUL)
		return result;

		if (((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_1)) \|\|
		((header_type != PCI_HEADER_TYPE_BRIDGE) && ((where >= PCI_BASE_ADDRESS_2) &&
		(where <= PCI_BASE_ADDRESS_5))))
		{
		if ((value & PCI_BASE_ADDRESS_SPACE) ==
		PCI_BASE_ADDRESS_SPACE_IO)
		{
		/*
		* I/O address. Check if the address is valid address on
		* the Hades (pci_io_base_virt <= value < pci_io_base_virt +
		* HADES_VIRT_IO_SIZE) or if the value is 0xffffffff. If not
		* true do not write the base address register. If it is a
		* valid base address subtract 'pci_io_base_virt' from the value.
		*/

		if ((value >= pci_io_base_virt) && (value < (pci_io_base_virt +
		HADES_VIRT_IO_SIZE)))
		value -= pci_io_base_virt;
		else
		{
		if (value != 0xffffffff)
		return PCIBIOS_SET_FAILED;
		}
		}
		else
		{
		/*
		* Memory address. Check if the address is valid address on
		* the Hades (HADES_MEM_BASE <= value < HADES_MEM_BASE + HADES_MEM_SIZE) or
		* if the value is 0xffffffff. If not true do not write
		* the base address register. If it is a valid base address
		* subtract HADES_MEM_BASE from the value.
		*/

		if ((value >= HADES_MEM_BASE) && (value < (HADES_MEM_BASE + HADES_MEM_SIZE)))
		value -= HADES_MEM_BASE;
		else
		{
		if (value != 0xffffffff)
		return PCIBIOS_SET_FAILED;
		}
		}
		}

		*pci_addr = cpu_to_le32(value);

		return PCIBIOS_SUCCESSFUL;
		}

		/*
		* static inline void hades_fixup(void)
		*
		* Assign IRQ numbers as used by Linux to the interrupt pins
		* of the PCI cards.
		*/

		static void __init hades_fixup(int pci_modify)
		{
		char irq_tab[4] = {
		[0] = IRQ_TT_MFP_IO0, /* Slot 0. */
		[1] = IRQ_TT_MFP_IO1, /* Slot 1. */
		[2] = IRQ_TT_MFP_SCC, /* Slot 2. */
		[3] = IRQ_TT_MFP_SCSIDMA /* Slot 3. */
		};
		struct pci_dev *dev = NULL;
		unsigned char slot;

		/*
		* Go through all devices, fixing up irqs as we see fit:
		*/

		while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL)
		{
		if (dev->class >> 16 != PCI_BASE_CLASS_BRIDGE)
		{
		slot = PCI_SLOT(dev->devfn); /* Determine slot number. */
		dev->irq = irq_tab[slot];
		if (pci_modify)
		pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
		}
		}
		}

		/*
		* static void hades_conf_device(struct pci_dev *dev)
		*
		* Machine dependent Configure the given device.
		*
		* Parameters:
		*
		* dev - the pci device.
		*/

		static void __init hades_conf_device(struct pci_dev *dev)
		{
		pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0);
		}

		static struct pci_ops hades_pci_ops = {
		.read_byte = hades_read_config_byte,
		.read_word = hades_read_config_word,
		.read_dword = hades_read_config_dword,
		.write_byte = hades_write_config_byte,
		.write_word = hades_write_config_word,
		.write_dword = hades_write_config_dword
		};

		/*
		* struct pci_bus_info *init_hades_pci(void)
		*
		* Machine specific initialisation:
		*
		* - Allocate and initialise a 'pci_bus_info' structure
		* - Initialise hardware
		*
		* Result: pointer to 'pci_bus_info' structure.
		*/

		struct pci_bus_info * __init init_hades_pci(void)
		{
		struct pci_bus_info *bus;
		int i;

		/*
		* Remap I/O and configuration space.
		*/

		pci_io_base_virt = (unsigned long) ioremap(HADES_IO_BASE, HADES_VIRT_IO_SIZE);

		for (i = 0; i < N_SLOTS; i++)
		pci_conf_base_virt[i] = (unsigned long) ioremap(pci_conf_base_phys[i], 0x10000);

		/*
		* Allocate memory for bus info structure.
		*/

		bus = kzalloc(sizeof(struct pci_bus_info), GFP_KERNEL);
		if (unlikely(!bus))
		goto iounmap_base_virt;

		/*
		* Claim resources. The m68k has no separate I/O space, both
		* PCI memory space and PCI I/O space are in memory space. Therefore
		* the I/O resources are requested in memory space as well.
		*/

		if (unlikely(request_resource(&iomem_resource, &config_space) != 0))
		goto free_bus;

		if (unlikely(request_resource(&iomem_resource, &io_space) != 0))
		goto release_config_space;

		bus->mem_space.start = HADES_MEM_BASE;
		bus->mem_space.end = HADES_MEM_BASE + HADES_MEM_SIZE - 1;
		bus->mem_space.name = pci_mem_name;
		#if 1
		if (unlikely(request_resource(&iomem_resource, &bus->mem_space) != 0))
		goto release_io_space;
		#endif
		bus->io_space.start = pci_io_base_virt;
		bus->io_space.end = pci_io_base_virt + HADES_VIRT_IO_SIZE - 1;
		bus->io_space.name = pci_io_name;
		#if 1
		if (unlikely(request_resource(&ioport_resource, &bus->io_space) != 0))
		goto release_bus_mem_space;
		#endif
		/*
		* Set hardware dependent functions.
		*/

		bus->m68k_pci_ops = &hades_pci_ops;
		bus->fixup = hades_fixup;
		bus->conf_device = hades_conf_device;

		/*
		* Select high to low edge for PCI interrupts.
		*/

		tt_mfp.active_edge &= ~0x27;

		return bus;

		release_bus_mem_space:
		release_resource(&bus->mem_space);
		release_io_space:
		release_resource(&io_space);
		release_config_space:
		release_resource(&config_space);
		free_bus:
		kfree(bus);
		iounmap_base_virt:
		iounmap((void *)pci_io_base_virt);

		for (i = 0; i < N_SLOTS; i++)
		iounmap((void *)pci_conf_base_virt[i]);

		return NULL;
		}
		#endif