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Commit 29c3035f authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/gfx9: properly set the hdp flush reg for Raven 



Was only being assigned for vega10.

Reviewed-by: default avatarJunwei Zhang <Jerry.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 298e87c9

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+3 −1
Original line number Original line Diff line number Diff line
@@ -3504,7 +3504,9 @@ static void gfx_v9_0_ring_emit_hdp_flush(struct amdgpu_ring *ring) 
	u32 ref_and_mask, reg_mem_engine;

	u32 ref_and_mask, reg_mem_engine;

	struct nbio_hdp_flush_reg *nbio_hf_reg;

	struct nbio_hdp_flush_reg *nbio_hf_reg;





	if (ring->adev->asic_type == CHIP_VEGA10)

	if (ring->adev->flags & AMD_IS_APU)

		nbio_hf_reg = &nbio_v7_0_hdp_flush_reg;

	else

		nbio_hf_reg = &nbio_v6_1_hdp_flush_reg;

		nbio_hf_reg = &nbio_v6_1_hdp_flush_reg;





	if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) {

	if (ring->funcs->type == AMDGPU_RING_TYPE_COMPUTE) {