Loading arch/arm/boot/dts/imx28.dtsi +24 −24 Original line number Diff line number Diff line Loading @@ -64,7 +64,7 @@ reg = <0x80000000 0x2000>; }; hsadc@80002000 { hsadc: hsadc@80002000 { reg = <0x80002000 0x2000>; interrupts = <13>; dmas = <&dma_apbh 12>; Loading @@ -88,13 +88,13 @@ clocks = <&clks 25>; }; perfmon@80006000 { perfmon: perfmon@80006000 { reg = <0x80006000 0x800>; interrupts = <27>; status = "disabled"; }; gpmi-nand@8000c000 { gpmi: gpmi-nand@8000c000 { compatible = "fsl,imx28-gpmi-nand"; #address-cells = <1>; #size-cells = <1>; Loading Loading @@ -153,7 +153,7 @@ status = "disabled"; }; pinctrl@80018000 { pinctrl: pinctrl@80018000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx28-pinctrl", "simple-bus"; Loading Loading @@ -702,14 +702,14 @@ }; }; digctl@8001c000 { digctl: digctl@8001c000 { compatible = "fsl,imx28-digctl", "fsl,imx23-digctl"; reg = <0x8001c000 0x2000>; interrupts = <89>; status = "disabled"; }; etm@80022000 { etm: etm@80022000 { reg = <0x80022000 0x2000>; status = "disabled"; }; Loading @@ -730,19 +730,19 @@ clocks = <&clks 26>; }; dcp@80028000 { dcp: dcp@80028000 { reg = <0x80028000 0x2000>; interrupts = <52 53 54>; compatible = "fsl-dcp"; }; pxp@8002a000 { pxp: pxp@8002a000 { reg = <0x8002a000 0x2000>; interrupts = <39>; status = "disabled"; }; ocotp@8002c000 { ocotp: ocotp@8002c000 { compatible = "fsl,ocotp"; reg = <0x8002c000 0x2000>; status = "disabled"; Loading @@ -753,7 +753,7 @@ status = "disabled"; }; lcdif@80030000 { lcdif: lcdif@80030000 { compatible = "fsl,imx28-lcdif"; reg = <0x80030000 0x2000>; interrupts = <38>; Loading Loading @@ -781,37 +781,37 @@ status = "disabled"; }; simdbg@8003c000 { simdbg: simdbg@8003c000 { reg = <0x8003c000 0x200>; status = "disabled"; }; simgpmisel@8003c200 { simgpmisel: simgpmisel@8003c200 { reg = <0x8003c200 0x100>; status = "disabled"; }; simsspsel@8003c300 { simsspsel: simsspsel@8003c300 { reg = <0x8003c300 0x100>; status = "disabled"; }; simmemsel@8003c400 { simmemsel: simmemsel@8003c400 { reg = <0x8003c400 0x100>; status = "disabled"; }; gpiomon@8003c500 { gpiomon: gpiomon@8003c500 { reg = <0x8003c500 0x100>; status = "disabled"; }; simenet@8003c700 { simenet: simenet@8003c700 { reg = <0x8003c700 0x100>; status = "disabled"; }; armjtag@8003c800 { armjtag: armjtag@8003c800 { reg = <0x8003c800 0x100>; status = "disabled"; }; Loading Loading @@ -841,7 +841,7 @@ status = "disabled"; }; power@80044000 { power: power@80044000 { reg = <0x80044000 0x2000>; status = "disabled"; }; Loading @@ -856,7 +856,7 @@ status = "disabled"; }; lradc@80050000 { lradc: lradc@80050000 { compatible = "fsl,imx28-lradc"; reg = <0x80050000 0x2000>; interrupts = <10 14 15 16 17 18 19 Loading @@ -864,7 +864,7 @@ status = "disabled"; }; spdif@80054000 { spdif: spdif@80054000 { reg = <0x80054000 0x2000>; interrupts = <45>; dmas = <&dma_apbx 2>; Loading @@ -872,7 +872,7 @@ status = "disabled"; }; rtc@80056000 { mxs_rtc: rtc@80056000 { compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc"; reg = <0x80056000 0x2000>; interrupts = <29>; Loading Loading @@ -911,7 +911,7 @@ status = "disabled"; }; timrot@80068000 { timer: timrot@80068000 { compatible = "fsl,imx28-timrot", "fsl,timrot"; reg = <0x80068000 0x2000>; interrupts = <48 49 50 51>; Loading Loading @@ -1018,7 +1018,7 @@ status = "disabled"; }; dflpt@800c0000 { dflpt: dflpt@800c0000 { reg = <0x800c0000 0x10000>; status = "disabled"; }; Loading @@ -1041,7 +1041,7 @@ status = "disabled"; }; switch@800f8000 { etn_switch: switch@800f8000 { reg = <0x800f8000 0x8000>; status = "disabled"; }; Loading Loading
arch/arm/boot/dts/imx28.dtsi +24 −24 Original line number Diff line number Diff line Loading @@ -64,7 +64,7 @@ reg = <0x80000000 0x2000>; }; hsadc@80002000 { hsadc: hsadc@80002000 { reg = <0x80002000 0x2000>; interrupts = <13>; dmas = <&dma_apbh 12>; Loading @@ -88,13 +88,13 @@ clocks = <&clks 25>; }; perfmon@80006000 { perfmon: perfmon@80006000 { reg = <0x80006000 0x800>; interrupts = <27>; status = "disabled"; }; gpmi-nand@8000c000 { gpmi: gpmi-nand@8000c000 { compatible = "fsl,imx28-gpmi-nand"; #address-cells = <1>; #size-cells = <1>; Loading Loading @@ -153,7 +153,7 @@ status = "disabled"; }; pinctrl@80018000 { pinctrl: pinctrl@80018000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx28-pinctrl", "simple-bus"; Loading Loading @@ -702,14 +702,14 @@ }; }; digctl@8001c000 { digctl: digctl@8001c000 { compatible = "fsl,imx28-digctl", "fsl,imx23-digctl"; reg = <0x8001c000 0x2000>; interrupts = <89>; status = "disabled"; }; etm@80022000 { etm: etm@80022000 { reg = <0x80022000 0x2000>; status = "disabled"; }; Loading @@ -730,19 +730,19 @@ clocks = <&clks 26>; }; dcp@80028000 { dcp: dcp@80028000 { reg = <0x80028000 0x2000>; interrupts = <52 53 54>; compatible = "fsl-dcp"; }; pxp@8002a000 { pxp: pxp@8002a000 { reg = <0x8002a000 0x2000>; interrupts = <39>; status = "disabled"; }; ocotp@8002c000 { ocotp: ocotp@8002c000 { compatible = "fsl,ocotp"; reg = <0x8002c000 0x2000>; status = "disabled"; Loading @@ -753,7 +753,7 @@ status = "disabled"; }; lcdif@80030000 { lcdif: lcdif@80030000 { compatible = "fsl,imx28-lcdif"; reg = <0x80030000 0x2000>; interrupts = <38>; Loading Loading @@ -781,37 +781,37 @@ status = "disabled"; }; simdbg@8003c000 { simdbg: simdbg@8003c000 { reg = <0x8003c000 0x200>; status = "disabled"; }; simgpmisel@8003c200 { simgpmisel: simgpmisel@8003c200 { reg = <0x8003c200 0x100>; status = "disabled"; }; simsspsel@8003c300 { simsspsel: simsspsel@8003c300 { reg = <0x8003c300 0x100>; status = "disabled"; }; simmemsel@8003c400 { simmemsel: simmemsel@8003c400 { reg = <0x8003c400 0x100>; status = "disabled"; }; gpiomon@8003c500 { gpiomon: gpiomon@8003c500 { reg = <0x8003c500 0x100>; status = "disabled"; }; simenet@8003c700 { simenet: simenet@8003c700 { reg = <0x8003c700 0x100>; status = "disabled"; }; armjtag@8003c800 { armjtag: armjtag@8003c800 { reg = <0x8003c800 0x100>; status = "disabled"; }; Loading Loading @@ -841,7 +841,7 @@ status = "disabled"; }; power@80044000 { power: power@80044000 { reg = <0x80044000 0x2000>; status = "disabled"; }; Loading @@ -856,7 +856,7 @@ status = "disabled"; }; lradc@80050000 { lradc: lradc@80050000 { compatible = "fsl,imx28-lradc"; reg = <0x80050000 0x2000>; interrupts = <10 14 15 16 17 18 19 Loading @@ -864,7 +864,7 @@ status = "disabled"; }; spdif@80054000 { spdif: spdif@80054000 { reg = <0x80054000 0x2000>; interrupts = <45>; dmas = <&dma_apbx 2>; Loading @@ -872,7 +872,7 @@ status = "disabled"; }; rtc@80056000 { mxs_rtc: rtc@80056000 { compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc"; reg = <0x80056000 0x2000>; interrupts = <29>; Loading Loading @@ -911,7 +911,7 @@ status = "disabled"; }; timrot@80068000 { timer: timrot@80068000 { compatible = "fsl,imx28-timrot", "fsl,timrot"; reg = <0x80068000 0x2000>; interrupts = <48 49 50 51>; Loading Loading @@ -1018,7 +1018,7 @@ status = "disabled"; }; dflpt@800c0000 { dflpt: dflpt@800c0000 { reg = <0x800c0000 0x10000>; status = "disabled"; }; Loading @@ -1041,7 +1041,7 @@ status = "disabled"; }; switch@800f8000 { etn_switch: switch@800f8000 { reg = <0x800f8000 0x8000>; status = "disabled"; }; Loading