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Commit 2899e12f authored by Boris Brezillon's avatar Boris Brezillon Committed by Thierry Reding
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pwm: add DT bindings documentation for atmel-hlcdc-pwm driver



The HLCDC IP available in some Atmel SoCs (i.e. at91sam9x5, at91sam9n12
or sama5d3 families for instance) provides a PWM device.

The DT bindings used for this PWM device is following the default 3 cells
bindings described in Documentation/devicetree/bindings/pwm/pwm.txt.

Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: default avatarThierry Reding <thierry.reding@gmail.com>
Acked-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: default avatarThierry Reding <thierry.reding@gmail.com>
parent 2b4984be
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Device-Tree bindings for Atmel's HLCDC (High-end LCD Controller) PWM driver

The Atmel HLCDC PWM is subdevice of the HLCDC MFD device.
See ../mfd/atmel-hlcdc.txt for more details.

Required properties:
 - compatible: value should be one of the following:
   "atmel,hlcdc-pwm"
 - pinctr-names: the pin control state names. Should contain "default".
 - pinctrl-0: should contain the pinctrl states described by pinctrl
   default.
 - #pwm-cells: should be set to 3. This PWM chip use the default 3 cells
   bindings defined in pwm.txt in this directory.

Example:

	hlcdc: hlcdc@f0030000 {
		compatible = "atmel,sama5d3-hlcdc";
		reg = <0xf0030000 0x2000>;
		clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
		clock-names = "periph_clk","sys_clk", "slow_clk";

		hlcdc_pwm: hlcdc-pwm {
			compatible = "atmel,hlcdc-pwm";
			pinctrl-names = "default";
			pinctrl-0 = <&pinctrl_lcd_pwm>;
			#pwm-cells = <3>;
		};
	};