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Commit 27ddabc3 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 

Fixes for some locking issues, and fence timeouts.

* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6:
  drm/nouveau: do not allow negative sizes for now
  drm/nouveau: add falcon interrupt handler
  drm/nouveau: use dedicated channel for async moves on GT/GF chipsets.
  drm/nouveau: bump fence timeout to 15 seconds
  drm/nouveau: do not unpin in nouveau_gem_object_del
  drm/nv50/kms: fix pin refcnt leaks
  drm/nouveau: fix some error-path leaks in fbcon handling code
  drm/nouveau: fix locking issues in page flipping paths
parents 25f397a4 0108bc80

drivers/gpu/drm/nouveau/core/engine/bsp/nvc0.c

+1 −0
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ nvc0_bsp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
		return ret;



	nv_subdev(priv)->unit = 0x00008000;

	nv_subdev(priv)->intr = nouveau_falcon_intr;

	nv_engine(priv)->cclass = &nvc0_bsp_cclass;

	nv_engine(priv)->sclass = nvc0_bsp_sclass;

	return 0;

drivers/gpu/drm/nouveau/core/engine/bsp/nve0.c

+1 −0
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ nve0_bsp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
		return ret;



	nv_subdev(priv)->unit = 0x00008000;

	nv_subdev(priv)->intr = nouveau_falcon_intr;

	nv_engine(priv)->cclass = &nve0_bsp_cclass;

	nv_engine(priv)->sclass = nve0_bsp_sclass;

	return 0;

drivers/gpu/drm/nouveau/core/engine/falcon.c

+19 −0
Original line number Diff line number Diff line
@@ -23,6 +23,25 @@ 
#include <engine/falcon.h>

#include <subdev/timer.h>



void

nouveau_falcon_intr(struct nouveau_subdev *subdev)

{

	struct nouveau_falcon *falcon = (void *)subdev;

	u32 dispatch = nv_ro32(falcon, 0x01c);

	u32 intr = nv_ro32(falcon, 0x008) & dispatch & ~(dispatch >> 16);



	if (intr & 0x00000010) {

		nv_debug(falcon, "ucode halted\n");

		nv_wo32(falcon, 0x004, 0x00000010);

		intr &= ~0x00000010;

	}



	if (intr)  {

		nv_error(falcon, "unhandled intr 0x%08x\n", intr);

		nv_wo32(falcon, 0x004, intr);

	}

}



u32

_nouveau_falcon_rd32(struct nouveau_object *object, u64 addr)

{

drivers/gpu/drm/nouveau/core/engine/ppp/nvc0.c

+1 −0
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ nvc0_ppp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
		return ret;



	nv_subdev(priv)->unit = 0x00000002;

	nv_subdev(priv)->intr = nouveau_falcon_intr;

	nv_engine(priv)->cclass = &nvc0_ppp_cclass;

	nv_engine(priv)->sclass = nvc0_ppp_sclass;

	return 0;

drivers/gpu/drm/nouveau/core/engine/vp/nvc0.c

+1 −0
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ nvc0_vp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
		return ret;



	nv_subdev(priv)->unit = 0x00020000;

	nv_subdev(priv)->intr = nouveau_falcon_intr;

	nv_engine(priv)->cclass = &nvc0_vp_cclass;

	nv_engine(priv)->sclass = nvc0_vp_sclass;

	return 0;