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Commit 24e2cbce authored by Asha Magadi Venkateshamurthy's avatar Asha Magadi Venkateshamurthy
Browse files

ARM: dts: msm: Add energy costs for SDM660 



Add cpu and cluster energy costs with available frequencies for SDM660
these are used by energy aware scheduler in task placement decisions.

Change-Id: I5756e80656be525937f9d0ec05649acdef42c2bf
Signed-off-by: default avatarAsha Magadi Venkateshamurthy <amagad@codeaurora.org>
parent 3eb9c77d

arch/arm64/boot/dts/qcom/sdm660.dtsi

+82 −0
Original line number Diff line number Diff line
@@ -58,6 +58,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x0>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;

			qcom,lmh-dcvs = <&lmh_dcvs0>;

			efficiency = <1024>;

			next-level-cache = <&L2_0>;
@@ -86,6 +88,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x1>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;

			qcom,lmh-dcvs = <&lmh_dcvs0>;

			#cooling-cells = <2>;

			efficiency = <1024>;
@@ -108,6 +112,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x2>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;

			qcom,lmh-dcvs = <&lmh_dcvs0>;

			efficiency = <1024>;

			next-level-cache = <&L2_0>;
@@ -130,6 +136,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x3>;

			enable-method = "psci";

			capacity-dmips-mhz = <1024>;

			sched-energy-costs = <&CPU_COST_0 &CLUSTER_COST_0>;

			qcom,lmh-dcvs = <&lmh_dcvs0>;

			efficiency = <1024>;

			next-level-cache = <&L2_0>;
@@ -152,6 +160,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x100>;

			enable-method = "psci";

			capacity-dmips-mhz = <1638>;

			sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>;

			qcom,lmh-dcvs = <&lmh_dcvs1>;

			efficiency = <1638>;

			next-level-cache = <&L2_1>;
@@ -178,6 +188,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x101>;

			enable-method = "psci";

			capacity-dmips-mhz = <1638>;

			sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>;

			qcom,lmh-dcvs = <&lmh_dcvs1>;

			#cooling-cells = <2>;

			efficiency = <1638>;
@@ -200,6 +212,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x102>;

			enable-method = "psci";

			capacity-dmips-mhz = <1638>;

			sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>;

			qcom,lmh-dcvs = <&lmh_dcvs1>;

			#cooling-cells = <2>;

			efficiency = <1638>;
@@ -222,6 +236,8 @@ 
			compatible = "arm,armv8";

			reg = <0x0 0x103>;

			enable-method = "psci";

			capacity-dmips-mhz = <1638>;

			sched-energy-costs = <&CPU_COST_1 &CLUSTER_COST_1>;

			qcom,lmh-dcvs = <&lmh_dcvs1>;

			#cooling-cells = <2>;

			efficiency = <1638>;
@@ -278,6 +294,72 @@ 
		};

	};



	energy_costs: energy-costs {

		compatible = "sched-energy";



		CPU_COST_0: core-cost0 {

			busy-cost-data = <

				633600	41

				902400	70

				1113600	83

				1401600	146

				1536000	158

				1747200	228

				1843200	285

			>;

			idle-cost-data = <

				20 16 10 8

			>;

		};



		CPU_COST_1: core-cost1 {

			busy-cost-data = <

				1113600	307

				1401600	485

				1747200	857

				1804800	883

				1958400	1222

				2150400	1592

				2208000	1632

				2457600	2080

			>;

			idle-cost-data = <

				100 80 60 40

			>;

		};



		CLUSTER_COST_0: cluster-cost0 {

			busy-cost-data = <

				633600	4

				902400	5

				1113600	7

				1401600	9

				1536000	9

				1747200	11

				1843200	13

			>;

			idle-cost-data = <

				4 3 2 1

			>;

		};



		CLUSTER_COST_1: cluster-cost1 {

			busy-cost-data = <

				1113600	14

				1401600	17

				1747200	25

				1804800	31

				1958400	31

				2150400	37

				2208000	44

				2457600	45

			>;

			idle-cost-data = <

				4 3 2 1

			>;

		};

	};



	clocks {

		xo_board {

			compatible = "fixed-clock";