Commit 2289b3ab authored Sep 18, 2019 by Fabrice Gasnier Committed by Greg Kroah-Hartman Oct 11, 2019

pwm: stm32-lp: Add check in case requested period cannot be achieved



[ Upstream commit c91e3234c6035baf5a79763cb4fcd5d23ce75c2b ]

LPTimer can use a 32KHz clock for counting. It depends on clock tree
configuration. In such a case, PWM output frequency range is limited.
Although unlikely, nothing prevents user from requesting a PWM frequency
above counting clock (32KHz for instance):
- This causes (prd - 1) = 0xffff to be written in ARR register later in
the apply() routine.
This results in badly configured PWM period (and also duty_cycle).
Add a check to report an error is such a case.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

parent fecdf72f

drivers/pwm/pwm-stm32-lp.c

+6 −0

Original line number	Diff line number	Diff line
		@@ -59,6 +59,12 @@ static int stm32_pwm_lp_apply(struct pwm_chip chip, struct pwm_device pwm,
		/* Calculate the period and prescaler value */
		div = (unsigned long long)clk_get_rate(priv->clk) * state->period;
		do_div(div, NSEC_PER_SEC);
		if (!div) {
		/* Clock is too slow to achieve requested period. */
		dev_dbg(priv->chip.dev, "Can't reach %u ns\n", state->period);
		return -EINVAL;
		}

		prd = div;
		while (div > STM32_LPTIM_MAX_ARR) {
		presc++;