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Commit 1f76a03b authored by Mohammed Javid's avatar Mohammed Javid
Browse files

msm: ipa4: Fix to set correct clock and response state bitmask values 



Invalid bit mask and shift operation causing the modem not
receiving the correct response. Added change to send correct
clock and response state bitmask values.

Change-Id: I525a1d2fc59369e386c9359344aacd98f8c18d32
Acked-by: default avatarAshok Vuyyuru <avuyyuru@qti.qualcomm.com>
Signed-off-by: default avatarMohammed Javid <mjavid@codeaurora.org>
parent 418f4a45

drivers/platform/msm/ipa/ipa_v3/ipa.c

+8 −4
Original line number Diff line number Diff line
@@ -4318,8 +4318,10 @@ static void ipa3_freeze_clock_vote_and_notify_modem(void) 
		ipa3_ctx->smp2p_info.ipa_clk_on = true;



	qcom_smem_state_update_bits(ipa3_ctx->smp2p_info.smem_state,

			BIT(IPA_SMP2P_SMEM_STATE_MASK),

			BIT(ipa3_ctx->smp2p_info.ipa_clk_on | (1 << 1)));

			IPA_SMP2P_SMEM_STATE_MASK,

			((ipa3_ctx->smp2p_info.ipa_clk_on <<

			IPA_SMP2P_OUT_CLK_VOTE_IDX) |

			(1 << IPA_SMP2P_OUT_CLK_RSP_CMPLT_IDX)));



	ipa3_ctx->smp2p_info.res_sent = true;

	IPADBG("IPA clocks are %s\n",
@@ -4335,8 +4337,10 @@ void ipa3_reset_freeze_vote(void) 
		IPA_ACTIVE_CLIENTS_DEC_SPECIAL("FREEZE_VOTE");



	qcom_smem_state_update_bits(ipa3_ctx->smp2p_info.smem_state,

		BIT(IPA_SMP2P_SMEM_STATE_MASK),

		BIT(ipa3_ctx->smp2p_info.ipa_clk_on | (1 << 1)));

			IPA_SMP2P_SMEM_STATE_MASK,

			((ipa3_ctx->smp2p_info.ipa_clk_on <<

			IPA_SMP2P_OUT_CLK_VOTE_IDX) |

			(1 << IPA_SMP2P_OUT_CLK_RSP_CMPLT_IDX)));



	ipa3_ctx->smp2p_info.res_sent = false;

	ipa3_ctx->smp2p_info.ipa_clk_on = false;

drivers/platform/msm/ipa/ipa_v3/ipa_i.h

+2 −0
Original line number Diff line number Diff line
@@ -229,6 +229,8 @@ enum { 
# define __cpuc_flush_dcache_area __flush_dcache_area

#endif



#define IPA_SMP2P_OUT_CLK_RSP_CMPLT_IDX 0

#define IPA_SMP2P_OUT_CLK_VOTE_IDX 1

#define IPA_SMP2P_SMEM_STATE_MASK 3