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Commit 1f070ef4 authored by Lakshit Tyagi's avatar Lakshit Tyagi Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: STMMAC changes for SA8155 LV 



Add support for STMMAC in SA8155 dts.

Change-Id: If4b603243126a8a95235616927abf327f346d14c
Signed-off-by: default avatarLakshit Tyagi <ltyagi@codeaurora.org>
parent c679de8f

arch/arm64/boot/dts/qcom/sa8155-v2.dtsi

+5 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.

/* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -19,6 +19,10 @@ 
	qcom,msm-id = <362 0x20000>;

};



&ethqos_hw {

	emac-core-version = <0x20010002>;

};



&emac_hw {

	emac-core-version = <4>;

	early-ethernet-en;

arch/arm64/boot/dts/qcom/sa8155.dtsi

+144 −0
Original line number Diff line number Diff line
@@ -632,6 +632,150 @@ 
		};

	};



	mtl_rx_setup: rx-queues-config {

		snps,rx-queues-to-use = <4>;

		snps,rx-sched-sp;



		queue0 {

			snps,dcb-algorithm;

			snps,map-to-dma-channel = <0x0>;

			snps,route-up;

			snps,priority = <0x1>;

		};



		queue1 {

			snps,dcb-algorithm;

			snps,map-to-dma-channel = <0x1>;

			snps,route-ptp;

		};



		queue2 {

			snps,avb-algorithm;

			snps,map-to-dma-channel = <0x2>;

			snps,route-avcp;

		};



		queue3 {

			snps,avb-algorithm;

			snps,map-to-dma-channel = <0x3>;

			snps,priority = <0xC>;

		};

	};



	mtl_tx_setup: tx-queues-config {

		snps,tx-queues-to-use = <5>;

		snps,tx-sched-sp;

		queue0 {

			snps,dcb-algorithm;

		};



		queue1 {

			snps,dcb-algorithm;

		};



		queue2 {

			snps,avb-algorithm;

			snps,send_slope = <0x1000>;

			snps,idle_slope = <0x1000>;

			snps,high_credit = <0x3E800>;

			snps,low_credit = <0xFFC18000>;

		};



		queue3 {

			snps,avb-algorithm;

			snps,send_slope = <0x1000>;

			snps,idle_slope = <0x1000>;

			snps,high_credit = <0x3E800>;

			snps,low_credit = <0xFFC18000>;

		};

	};



	ethqos_hw: qcom,ethernet@00020000 {

		compatible = "qcom,stmmac-ethqos";

		qcom,arm-smmu;

		reg = <0x20000 0x10000>,

			<0x36000 0x100>,

			<0x3D00000 0x300000>;

		reg-names = "stmmaceth", "rgmii","tlmm-central-base";

		clocks = <&clock_gcc GCC_EMAC_AXI_CLK>,

			<&clock_gcc GCC_EMAC_SLV_AHB_CLK>,

			<&clock_gcc GCC_EMAC_PTP_CLK>,

			<&clock_gcc GCC_EMAC_RGMII_CLK>;

		clock-names = "stmmaceth", "pclk", "ptp_ref", "rgmii";

		snps,ptp-ref-clk-rate = <230400000>;

		snps,ptp-req-clk-rate = <57600000>;

		interrupts-extended = <&pdc 0 689 4>, <&pdc 0 699 4>,

			<&tlmm 124 2>;

		interrupt-names = "macirq", "eth_lpi",

			"phy-intr";

		qcom,msm-bus,name = "emac";

		qcom,msm-bus,num-cases = <4>;

		qcom,msm-bus,num-paths = <2>;

		qcom,msm-bus,vectors-KBps =

			<98 512 0 0>, <1 781 0 0>, /* No vote */

			<98 512 2500 0>, <1 781 0 40000>, /* 10Mbps vote */

			<98 512 25000 0>, <1 781 0 40000>, /* 100Mbps vote */

			<98 512 250000 0>, <1 781 0 40000>; /* 1000Mbps vote */

		qcom,bus-vector-names = "0", "10", "100", "1000";

		snps,tso;

		rx-fifo-depth = <16384>;

		tx-fifo-depth = <32768>;

		snps,mtl-rx-config = <&mtl_rx_setup>;

		snps,mtl-tx-config = <&mtl_tx_setup>;

		snps,reset-gpio = <&tlmm 79 GPIO_ACTIVE_HIGH>;

		qcom,phy-intr-redirect = <&tlmm 124 GPIO_ACTIVE_LOW>;

		gdsc_emac-supply = <&emac_gdsc>;



		pinctrl-names = "dev-emac-mdc",

			"dev-emac-mdio",

			"dev-emac-rgmii_txd0_state",

			"dev-emac-rgmii_txd1_state",

			"dev-emac-rgmii_txd2_state",

			"dev-emac-rgmii_txd3_state",

			"dev-emac-rgmii_txc_state",

			"dev-emac-rgmii_tx_ctl_state",

			"dev-emac-rgmii_rxd0_state",

			"dev-emac-rgmii_rxd1_state",

			"dev-emac-rgmii_rxd2_state",

			"dev-emac-rgmii_rxd3_state",

			"dev-emac-rgmii_rxc_state",

			"dev-emac-rgmii_rx_ctl_state",

			"dev-emac-phy_intr",

			"dev-emac-phy_reset_state",

			"dev-emac_pin_pps_0";



		pinctrl-0 = <&emac_mdc>;

		pinctrl-1 = <&emac_mdio>;



		pinctrl-2 = <&emac_rgmii_txd0>;

		pinctrl-3 = <&emac_rgmii_txd1>;

		pinctrl-4 = <&emac_rgmii_txd2>;

		pinctrl-5 = <&emac_rgmii_txd3>;

		pinctrl-6 = <&emac_rgmii_txc>;

		pinctrl-7 = <&emac_rgmii_tx_ctl>;



		pinctrl-8 = <&emac_rgmii_rxd0>;

		pinctrl-9 = <&emac_rgmii_rxd1>;

		pinctrl-10 = <&emac_rgmii_rxd2>;

		pinctrl-11 = <&emac_rgmii_rxd3>;

		pinctrl-12 = <&emac_rgmii_rxc>;

		pinctrl-13 = <&emac_rgmii_rx_ctl>;



		pinctrl-14 = <&emac_phy_intr>;

		pinctrl-15 = <&emac_phy_reset_state>;

		pinctrl-16 = <&emac_pin_pps_0>;



		snps,reset-active-low;

		snps,reset-delays-us = <0 10000 100000>;

		phy-mode = "rgmii";



		ethqos_emb_smmu: ethqos_emb_smmu {

			compatible = "qcom,emac-smmu-embedded";

			iommus = <&apps_smmu 0x3C0 0x0>;

			qcom,iova-mapping = <0x80000000 0x40000000>;

		};

	};



	emac_hw: qcom,emac@00020000 {

		compatible = "qcom,emac-dwc-eqos";

		qcom,arm-smmu;