Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1eae18f0 authored by Samantha Tran's avatar Samantha Tran
Browse files

drm/msm: Add snapshot of SDE, DSI, DP and supporting files 



This snapshot includes SDE, DP, DSI, supporting include
files, and Documentation. This change also addresses licensing
update to all files. In the process, all documentation is
moved to display/msm. Snapshot was taken from msm-4.14 as of
commit 5cc0f9c4 ("drivers: net: rmnet: introduce
rmnet traces")

Change-Id: I64d34c19fe432646d3210c1755cd746339f21912
Signed-off-by: default avatarSamantha Tran <samtran@codeaurora.org>
parent 4e1105e2

Documentation/devicetree/bindings/display/msm/dsi.txt

+3 −0
Original line number Diff line number Diff line
@@ -241,4 +241,7 @@ Example: 
		vddio-supply = <&pma8084_l12>;



		qcom,dsi-phy-regulator-ldo-mode;

		qcom,panel-allow-phy-poweroff;

		qcom,dsi-phy-regulator-min-datarate-bps = <1200000000>;

		qcom,panel-force-clock-lane-hs;

	};

Documentation/devicetree/bindings/display/msm/mdss-dsi-panel.txt

0 → 100644
+790 −0

File added.

Preview size limit exceeded, changes collapsed.

Documentation/devicetree/bindings/display/msm/mdss-pll.txt

0 → 100644
+105 −0
Original line number Diff line number Diff line 
Qualcomm Technologies, Inc. MDSS pll for DSI/EDP/HDMI



mdss-pll is a pll controller device which supports pll devices that

are compatible with MIPI display serial interface specification,

HDMI and edp.



Required properties:

- compatible:		Compatible name used in the driver. Should be one of:

                        "qcom,mdss_dsi_pll_8916", "qcom,mdss_dsi_pll_8939",

                        "qcom,mdss_dsi_pll_8974", "qcom,mdss_dsi_pll_8994",

                        "qcom,mdss_dsi_pll_8994", "qcom,mdss_dsi_pll_8909",

                        "qcom,mdss_hdmi_pll", "qcom,mdss_hdmi_pll_8994",

                        "qcom,mdss_dsi_pll_8992", "qcom,mdss_hdmi_pll_8992",

                        "qcom,mdss_dsi_pll_8996", "qcom,mdss_hdmi_pll_8996",

                        "qcom,mdss_hdmi_pll_8996_v2", "qcom,mdss_dsi_pll_8996_v2",

                        "qcom,mdss_hdmi_pll_8996_v3", "qcom,mdss_hdmi_pll_8996_v3_1p8",

                        "qcom,mdss_edp_pll_8996_v3",  "qcom,mdss_edp_pll_8996_v3_1p8",

                        "qcom,mdss_dsi_pll_10nm",  "qcom,mdss_dp_pll_8998",

                        "qcom,mdss_hdmi_pll_8998", "qcom,mdss_dp_pll_10nm",

                        "qcom,mdss_dsi_pll_7nm",   "qcom,mdss_dp_pll_7nm",

			"qcom,mdss_dsi_pll_28lpm"

- cell-index:		Specifies the controller used

- reg:			offset and length of the register set for the device.

- reg-names :		names to refer to register sets related to this device

- gdsc-supply:		Phandle for gdsc regulator device node.

- vddio-supply:		Phandle for vddio regulator device node.

- clocks:		List of Phandles for clock device nodes

			needed by the device.

- clock-names:		List of clock names needed by the device.

- clock-rate:		List of clock rates in Hz.



Optional properties:

- label:	       	A string used to describe the driver used.

- vcca-supply:		Phandle for vcca regulator device node.





- qcom,dsi-pll-ssc-en:	Boolean property to indicate that ssc is enabled.

- qcom,dsi-pll-ssc-mode: Spread-spectrum clocking. It can be either "down-spread"

			or "center-spread". Default is "down-spread" if it is not specified.

- qcom,ssc-frequency-hz:	Integer property to specify the spread frequency

			to be programmed for the SSC.

- qcom,ssc-ppm:		Integer property to specify the Parts per Million

			value of SSC.



- qcom,platform-supply-entries:	A node that lists the elements of the supply. There

				can be more than one instance of this binding,

				in which case the entry would be appended with

				the supply entry index.

				e.g. qcom,platform-supply-entry@0

				- reg: offset and length of the register set for the device.

				-- qcom,supply-name: name of the supply (vdd/vdda/vddio)

				-- qcom,supply-min-voltage: minimum voltage level (uV)

				-- qcom,supply-max-voltage: maximum voltage level (uV)

				-- qcom,supply-enable-load: load drawn (uA) from enabled supply

				-- qcom,supply-disable-load: load drawn (uA) from disabled supply

				-- qcom,supply-pre-on-sleep: time to sleep (ms) before turning on

				-- qcom,supply-post-on-sleep: time to sleep (ms) after turning on

				-- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off

				-- qcom,supply-post-off-sleep: time to sleep (ms) after turning off



Example:

	mdss_dsi0_pll: qcom,mdss_dsi_pll@fd922A00 {

		compatible = "qcom,mdss_dsi_pll_8974";

		label = "MDSS DSI 0 PLL";

		cell-index = <0>;



		reg = <0xfd922A00 0xD4>,

		      <0xfd922900 0x64>,

		      <0xfd8c2300 0x8>;

		reg-names = "pll_base", "dynamic_pll_base", "gdsc_base";

		gdsc-supply = <&gdsc_mdss>;

		vddio-supply = <&pm8941_l12>;

		vcca-supply = <&pm8941_l28>;



		clocks = <&clock_gcc clk_gcc_mdss_mdp_clk>,

			 <&clock_gcc clk_gcc_mdss_ahb_clk>,

			 <&clock_gcc clk_gcc_mdss_axi_clk>;

		clock-names = "mdp_core_clk", "iface_clk", "bus_clk";

		clock-rate = <0>, <0>, <0>;



		qcom,dsi-pll-slave;

		qcom,dsi-pll-ssc-en;

		qcom,dsi-pll-ssc-mode = "down-spread";

		qcom,ssc-frequency-hz = <30000>;

		qcom,ssc-ppm = <5000>;



		qcom,platform-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,platform-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vddio";

				qcom,supply-min-voltage = <1800000>;

				qcom,supply-max-voltage = <1800000>;

				qcom,supply-enable-load = <100000>;

				qcom,supply-disable-load = <100>;

				qcom,supply-pre-on-sleep = <0>;

				qcom,supply-post-on-sleep = <20>;

				qcom,supply-pre-off-sleep = <0>;

				qcom,supply-post-off-sleep = <0>;

			};

		};

	};

Documentation/devicetree/bindings/display/msm/sde-dp.txt

0 → 100644
+221 −0
Original line number Diff line number Diff line 
Qualcomm Technologies, Inc.

sde-dp is the master Display Port device which supports DP host controllers that are compatible with VESA Display Port interface specification.

DP Controller: Required properties:

- compatible:           Should be "qcom,dp-display".

- reg:                  Base address and length of DP hardware's memory mapped regions.

- reg-names:            A list of strings that name the list of regs. "dp_ctrl" - DP controller memory region.

			"dp_phy" - DP PHY memory region.

			"dp_ln_tx0" - USB3 DP PHY combo TX-0 lane memory region.

			"dp_ln_tx1" - USB3 DP PHY combo TX-1 lane memory region.

			"dp_mmss_cc" - Display Clock Control memory region.

			"qfprom_physical" - QFPROM Phys memory region.

			"dp_pll" - USB3 DP combo PLL memory region.

			"usb3_dp_com" - USB3 DP PHY combo memory region.

			"hdcp_physical" - DP HDCP memory region.

- cell-index:           Specifies the controller instance.

- clocks:               Clocks required for Display Port operation.

- clock-names:          Names of the clocks corresponding to handles. Following clocks are required:

			"core_aux_clk", "core_usb_ref_clk_src","core_usb_ref_clk", "core_usb_cfg_ahb_clk",

			"core_usb_pipe_clk", "ctrl_link_clk", "ctrl_link_iface_clk", "ctrl_crypto_clk",

			"ctrl_pixel_clk", "pixel_clk_rcg", "pixel_parent".

- gdsc-supply:		phandle to gdsc regulator node.

- vdda-1p2-supply:		phandle to vdda 1.2V regulator node.

- vdda-0p9-supply:		phandle to vdda 0.9V regulator node.

- interrupt-parent	phandle to the interrupt parent device node.

- interrupts:		The interrupt signal from the DSI block.

- qcom,aux-en-gpio:			Specifies the aux-channel enable gpio.

- qcom,aux-sel-gpio:		Specifies the aux-channel select gpio.

- qcom,usbplug-cc-gpio:		Specifies the usbplug orientation gpio.

- qcom,aux-cfg0-settings:		Specifies the DP AUX configuration 0 settings. The first

					entry in this array corresponds to the register offset

					within DP AUX, while the remaining entries indicate the

					programmable values.

- qcom,aux-cfg1-settings:		Specifies the DP AUX configuration 1 settings. The first

					entry in this array corresponds to the register offset

					within DP AUX, while the remaining entries indicate the

					programmable values.

- qcom,aux-cfg2-settings:		Specifies the DP AUX configuration 2 settings. The first

					entry in this array corresponds to the register offset

					within DP AUX, while the remaining entries indicate the

					programmable values.

- qcom,aux-cfg3-settings:		Specifies the DP AUX configuration 3 settings. The first

					entry in this array corresponds to the register offset

					within DP AUX, while the remaining entries indicate the

					programmable values.

- qcom,aux-cfg4-settings:		Specifies the DP AUX configuration 4 settings. The first

					entry in this array corresponds to the register offset

					within DP AUX, while the remaining entries indicate the

					programmable values.

- qcom,aux-cfg5-settings:		Specifies the DP AUX configuration 5 settings. The first

					entry in this array corresponds to the register offset

					within DP AUX, while the remaining entries indicate the

					programmable values.

- qcom,aux-cfg6-settings:		Specifies the DP AUX configuration 6 settings. The first

					entry in this array corresponds to the register offset

					within DP AUX, while the remaining entries indicate the

					programmable values.

- qcom,aux-cfg7-settings:		Specifies the DP AUX configuration 7 settings. The first

					entry in this array corresponds to the register offset

					within DP AUX, while the remaining entries indicate the

					programmable values.

- qcom,aux-cfg8-settings:		Specifies the DP AUX configuration 8 settings. The first

					entry in this array corresponds to the register offset

					within DP AUX, while the remaining entries indicate the

					programmable values.

- qcom,aux-cfg9-settings:		Specifies the DP AUX configuration 9 settings. The first

					entry in this array corresponds to the register offset

					within DP AUX, while the remaining entries indicate the

					programmable values.

- qcom,max-pclk-frequency-khz:	An integer specifying the max. pixel clock in KHz supported by Display Port.

- qcom,dp-usbpd-detection:	Phandle for the PMI regulator node for USB PHY PD detection.

- qcom,dp-aux-switch:		Phandle for the driver used to program the AUX switch for Display Port orientation.

- qcom,<type>-supply-entries:		A node that lists the elements of the supply used by the a particular "type" of DSI module. The module "types"

					can be "core", "ctrl", and "phy". Within the same type,

					there can be more than one instance of this binding,

					in which case the entry would be appended with the

					supply entry index.

					e.g. qcom,ctrl-supply-entry@0

					-- qcom,supply-name: name of the supply (vdd/vdda/vddio)

					-- qcom,supply-min-voltage: minimum voltage level (uV)

					-- qcom,supply-max-voltage: maximum voltage level (uV)

					-- qcom,supply-enable-load: load drawn (uA) from enabled supply

					-- qcom,supply-disable-load: load drawn (uA) from disabled supply

					-- qcom,supply-pre-on-sleep: time to sleep (ms) before turning on

					-- qcom,supply-post-on-sleep: time to sleep (ms) after turning on

					-- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off

					-- qcom,supply-post-off-sleep: time to sleep (ms) after turning off

- pinctrl-names:	List of names to assign mdss pin states defined in pinctrl device node

					Refer to pinctrl-bindings.txt

- pinctrl-<0..n>:	Lists phandles each pointing to the pin configuration node within a pin

					controller. These pin configurations are installed in the pinctrl

					device node. Refer to pinctrl-bindings.txt



msm_ext_disp is a device which manages the interaction between external

display interfaces, e.g. Display Port, and the audio subsystem.



Optional properties:

- qcom,ext-disp:		phandle for msm-ext-display module

- compatible:			Must be "qcom,msm-ext-disp"

- qcom,phy-version:		Phy version



[Optional child nodes]: These nodes are for devices which are

dependent on msm_ext_disp. If msm_ext_disp is disabled then

these devices will be disabled as well. Ex. Audio Codec device.



- ext_disp_audio_codec: Node for Audio Codec.

- compatible : "qcom,msm-ext-disp-audio-codec-rx";



Example:

	ext_disp: qcom,msm-ext-disp {

		compatible = "qcom,msm-ext-disp";

		ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx {

			compatible = "qcom,msm-ext-disp-audio-codec-rx";

		};

	};



	sde_dp: qcom,dp_display@0{

		cell-index = <0>;

		compatible = "qcom,dp-display";



		gdsc-supply = <&mdss_core_gdsc>;

		vdda-1p2-supply = <&pm8998_l26>;

		vdda-0p9-supply = <&pm8998_l1>;



		reg =	<0xae90000 0xa84>,

			<0x88eaa00 0x200>,

			<0x88ea200 0x200>,

			<0x88ea600 0x200>,

			<0xaf02000 0x1a0>,

			<0x780000 0x621c>,

			<0x88ea030 0x10>,

			<0x88e8000 0x621c>,

			<0x0aee1000 0x034>;

		reg-names = "dp_ctrl", "dp_phy", "dp_ln_tx0", "dp_ln_tx1",

			"dp_mmss_cc", "qfprom_physical", "dp_pll",

			"usb3_dp_com", "hdcp_physical";



		interrupt-parent = <&mdss_mdp>;

		interrupts = <12 0>;



		clocks =  <&clock_dispcc DISP_CC_MDSS_DP_AUX_CLK>,

			 <&clock_rpmh RPMH_CXO_CLK>,

			 <&clock_gcc GCC_USB3_PRIM_CLKREF_CLK>,

			 <&clock_gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,

			 <&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,

			 <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK>,

			 <&clock_dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,

			 <&clock_dispcc DISP_CC_MDSS_DP_CRYPTO_CLK>,

			 <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,

			 <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,

			 <&mdss_dp_pll DP_VCO_DIVIDED_CLK_SRC_MUX>;

		clock-names = "core_aux_clk", "core_usb_ref_clk_src",

			"core_usb_ref_clk", "core_usb_cfg_ahb_clk",

			"core_usb_pipe_clk", "ctrl_link_clk",

			"ctrl_link_iface_clk", "ctrl_crypto_clk",

			"ctrl_pixel_clk", "pixel_clk_rcg", "pixel_parent";



		qcom,dp-usbpd-detection = <&pm8150b_pdphy>;

		qcom,ext-disp = <&ext_disp>;

		qcom,phy-version = <0x420>;

		qcom,dp-aux-switch = <&fsa4480>;



		qcom,aux-cfg0-settings = [1c 00];

		qcom,aux-cfg1-settings = [20 13 23 1d];

		qcom,aux-cfg2-settings = [24 00];

		qcom,aux-cfg3-settings = [28 00];

		qcom,aux-cfg4-settings = [2c 0a];

		qcom,aux-cfg5-settings = [30 26];

		qcom,aux-cfg6-settings = [34 0a];

		qcom,aux-cfg7-settings = [38 03];

		qcom,aux-cfg8-settings = [3c bb];

		qcom,aux-cfg9-settings = [40 03];

		qcom,max-pclk-frequency-khz = <593470>;

		pinctrl-names = "mdss_dp_active", "mdss_dp_sleep";

		pinctrl-0 = <&sde_dp_aux_active &sde_dp_usbplug_cc_active>;

		pinctrl-1 = <&sde_dp_aux_suspend &sde_dp_usbplug_cc_suspend>;

		qcom,aux-en-gpio = <&tlmm 43 0>;

		qcom,aux-sel-gpio = <&tlmm 51 0>;

		qcom,usbplug-cc-gpio = <&tlmm 38 0>;

		qcom,core-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,core-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "gdsc";

				qcom,supply-min-voltage = <0>;

				qcom,supply-max-voltage = <0>;

				qcom,supply-enable-load = <0>;

				qcom,supply-disable-load = <0>;

			};

		};



		qcom,ctrl-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,ctrl-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdda-1p2";

				qcom,supply-min-voltage = <1200000>;

				qcom,supply-max-voltage = <1200000>;

				qcom,supply-enable-load = <21800>;

				qcom,supply-disable-load = <4>;

			};

		};



		qcom,phy-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,phy-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdda-0p9";

				qcom,supply-min-voltage = <880000>;

				qcom,supply-max-voltage = <880000>;

				qcom,supply-enable-load = <36000>;

				qcom,supply-disable-load = <32>;

			};

		};

	};

};

Documentation/devicetree/bindings/display/msm/sde-dsi.txt

0 → 100644
+112 −0
Original line number Diff line number Diff line 
Qualcomm Technologies, Inc.



mdss-dsi is the master DSI device which supports multiple DSI host controllers

that are compatible with MIPI display serial interface specification.



DSI Controller:

Required properties:

- compatible:           Should be "qcom,dsi-ctrl-hw-v<version>". Supported

			versions include 1.4, 2.0 and 2.2.

			eg: qcom,dsi-ctrl-hw-v1.4, qcom,dsi-ctrl-hw-v2.0,

			qcom,dsi-ctrl-hw-v2.2, qcom,dsi-ctrl-hw-v2.3

			And for dsi phy driver:

			qcom,dsi-phy-v0.0-hpm, qcom,dsi-phy-v0.0-lpm,

			qcom,dsi-phy-v1.0, qcom,dsi-phy-v2.0,

			qcom,dsi-phy-v3.0, qcom,dsi-phy-v4.0

- reg:                  Base address and length of DSI controller's memory

			mapped regions.

- reg-names:            A list of strings that name the list of regs.

			"dsi_ctrl" - DSI controller memory region.

			"mmss_misc" - MMSS misc memory region.

- cell-index:           Specifies the controller instance.

- clocks:               Clocks required for DSI controller operation.

- clock-names:          Names of the clocks corresponding to handles. Following

			clocks are required:

			"mdp_core_clk"

			"iface_clk"

			"core_mmss_clk"

			"bus_clk"

			"byte_clk"

			"pixel_clk"

			"core_clk"

			"byte_clk_rcg"

			"pixel_clk_rcg"

- gdsc-supply:		phandle to gdsc regulator node.

- vdda-supply:		phandle to vdda regulator node.

- vcca-supply:		phandle to vcca regulator node.

- interrupt-parent	phandle to the interrupt parent device node.

- interrupts:		The interrupt signal from the DSI block.



Bus Scaling Data:

- qcom,msm-bus,name:		String property describing MDSS client.

- qcom,msm-bus,num-cases:	This is the number of bus scaling use cases

				defined in the vectors property. This must be

				set to <2> for MDSS DSI driver where use-case 0

				is used to remove BW votes from the system. Use

				case 1 is used to generate bandwidth requestes

				when sending command packets.

- qcom,msm-bus,num-paths:	This represents number of paths in each bus

				scaling usecase. This value depends on number of

				AXI master ports dedicated to MDSS for

				particular chipset.

- qcom,msm-bus,vectors-KBps:	A series of 4 cell properties, with a format

				of (src, dst, ab, ib) which is defined at

				Documentation/devicetree/bindings/arm/msm/msm_bus.txt.

				DSI driver should always set average bandwidth

				(ab) to 0 and always use instantaneous

				bandwidth(ib) values.



Optional properties:

- label:                  String to describe controller.

- qcom,platform-te-gpio:  Specifies the gpio used for TE.

- qcom,dsi-display-active: Current active display

- qcom,dsi-ctrl: handle to dsi controller device

- qcom,dsi-phy: handle to dsi phy device

- qcom,dsi-ctrl-num:		Specifies the DSI controllers to use

- qcom,dsi-phy-num:		Specifies the DSI PHYs to use

- qcom,dsi-select-clocks:	Specifies the required clocks to use

- qcom,dsi-display-list:	Specifies the list of supported displays.

- qcom,dsi-manager:       Specifies dsi manager is present

- qcom,dsi-display:       Specifies dsi display is present

- qcom,hdmi-display:      Specifies hdmi is present

- qcom,dp-display:        Specified dp is present

- qcom,<type>-supply-entries:		A node that lists the elements of the supply used by the

					a particular "type" of DSI module. The module "types"

					can be "core", "ctrl", and "phy". Within the same type,

					there can be more than one instance of this binding,

					in which case the entry would be appended with the

					supply entry index.

					e.g. qcom,ctrl-supply-entry@0

					-- qcom,supply-name: name of the supply (vdd/vdda/vddio)

					-- qcom,supply-min-voltage: minimum voltage level (uV)

					-- qcom,supply-max-voltage: maximum voltage level (uV)

					-- qcom,supply-enable-load: load drawn (uA) from enabled supply

					-- qcom,supply-disable-load: load drawn (uA) from disabled supply

					-- qcom,supply-pre-on-sleep: time to sleep (ms) before turning on

					-- qcom,supply-post-on-sleep: time to sleep (ms) after turning on

					-- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off

					-- qcom,supply-post-off-sleep: time to sleep (ms) after turning off

- qcom,mdss-mdp-transfer-time-us:	Specifies the dsi transfer time for command mode

					panels in microseconds. Driver uses this number to adjust

					the clock rate according to the expected transfer time.

					Increasing this value would slow down the mdp processing

					and can result in slower performance.

					Decreasing this value can speed up the mdp processing,

					but this can also impact power consumption.

					As a rule this time should not be higher than the time

					that would be expected with the processing at the

					dsi link rate since anyways this would be the maximum

					transfer time that could be achieved.

					If ping pong split enabled, this time should not be higher

					than two times the dsi link rate time.

					If the property is not specified, then the default value is 14000 us.

- qcom,dsi-phy-isolation-enabled:	A boolean property enables the phy isolation from dsi

					controller. This must be enabled for debugging purpose

					only with simulator panel. It should not be enabled for

					normal DSI panels.

- - qcom,null-insertion-enabled:	A boolean to enable NULL packet insertion feature for DSI controller.

- ports:				This video port is used when external bridge is present.

					The connection is modeled using the OF graph bindings

					specified in Documentation/devicetree/bindings/graph.txt.

					Video port 0 reg 0 is for the bridge output. The remote

					endpoint phandle should be mipi_dsi_device device node.